Great! Glad you found it useful! Device parasitics are the culprit. These reactive elements occur between the “ideal” current generator inside the device and the actual output terminal (ie the physical drain connection on your IC/package). The goal is to present a reactive impedance externally which is transformed by the parasitic elements so that it is a real load value intrinsically. In this example, the parasitic elements in the model were zeroed out, hence the real load value.

+zianadir Thanks! And we love your suggestion...stay tuned!

+Keysight EEsof EDA any update?

+Denizhan Karaca Good question! You are correct -- the transconductance of a CMOS device is not linear -it’s a square law relationship (Id is proportional to Vgs-Vt squared) . This means that the positive portion of the gate (or input) waveform experiences a higher effective gm than the negative portion of the waveform. You may find this video on the basic classes of operation [kzfaq.info/get/bejne/fc6ApLOH0aq2gI0.html] interesting, as the nonlinearly which you refer to at the input is more explicitly illustrated (around 3:00). The video also shows that to get the classical values of efficiency for a power amplifier, the trans-conductance is linearized (Id is made proportional to Vgs-Vt) - or at least this is done in a mathematical sense to derive the waveforms and the corresponding ideal efficiency. Since no device actually behaves so nicely as to have a perfectly linear transconductance, you can therefore never realize the ideal efficiency values for a Power Amplifier in real life! This non-ideal transconductance also implies that there is no single bias point where the device will be exactly at the brink of turning on and off (the so called “threshold” in Class B where exactly half of the waveform perfectly conducts). Consequently, most amplifiers biased near the Class B threshold point have low or no small signal gain in the lab - in other words the Gain vs. Pout plot is highly expansive as power increases. One of the big challenges in any practical PA design is dealing with the effects of these types of non-idealities - in many cases what you can actually realize in the lab is far removed from the waveforms and loadlines that the theory implies. Depending on how you look at it, this can either be very disappointing or very exciting and interesting!

+Keysight EEsof EDA Thanks for your detailed explanation, it is very clear and helpful.

Keysight EEsof ED

i couldn't download it, can you please send it to me?

+Sheikh Aamir Ahsan Great question! Matt answered! Check out the blog article: rfdesigntips.blogs.keysight.com/

@@KeysightEEsofEDA can you please reshare the link?

I would like to add another question: With the similar concept how to explain the envelope current( for modulated signals) flow from the supply to the device and the load for both class A and reduced conduction angle mode operation( class AB/B). Thanks.

These are questions that could take a book’s worth to answer. Briefly, the DC supply provides the energy to the circuit. At the fundamental, the transistor converts this DC energy to a high frequency. It then gets exchanged between the transistor and the RF load network without much further supply interaction (assuming the choke’s designed well). The combination of the current in the load and device will sum to the DC value over a cycle. For that to work (assuming no storage), the load current must go high when the device current goes low - this is kind of a redirection of current from transistor to load during the RF cycle. When there is a modulated signal, it contains the high frequency signal, but now there is a lower frequency envelope, changing the input power dynamically. Plot current vs. Pin to see how that may impact the dynamic draw from the supply. For Class A, if it never goes into compression, the DC current does not change much vs. Pin, as you move to Class AB, current does change more with Pin. That means the device will dynamically try to pull current from the supply at the mod bandwidth - and if the bias network is designed well, then the supply will be able to deliver the current dynamically when needed.

@@KeysightEEsofEDA Many thanks for the detailed answer. I really appreciate that.

ME TOO