Glad you liked it!

thanks! And yes I'd love to be featured on REN!

They're developing a process here, so I think it's pretty normal to be hacking on the results

Yeah, amazing. When I visited I felt that in a different timeline I would have loved being involved in the design / build of science tools like this.

Thanks!

lolz

I wondered who would spot that! The thai food was great!

thanks!

LVL - laminography vs layout!

I know right!

Only 00:08 sec. into this video discussing integrated circuit designing 103 and then this happens ... IC Designer *:* "One of the hardest thing is, once you get your chips back, if something is wrong with it, how can you test it ?" 🤦 This designer requires remedial electronics, needs a bit of reverse engineering, maybe employ DUT/EUT/UUT methods for _in situ_ automation testing and please find this chip's electronic schematic. You do have a duplicate ? Yes ??

@@pikachu5188 I get that and the validation process. Even with intel they don’t shoot for 100% and really every chip has small differences on how efficient they work and performance output just intel makes it where as long as it can do so much it passes or fails. That’s normal and there will all ways be deviations in performance and stuff but that is to be expected and can be controlled thru quality control and validation processes.

Yeah most people absolutely do not know how chips are made let alone how once you have a chip then getting it to do what you want let alone then further optimization to get the most performance out with out breaking it or having inefficiencies that waste power usage. Let alone even begin to understand doing things on that scale they have standards and allowable differences in each individual chip and they only look to if they pass the minimum standards set and some can exceed that by quite a bit while others in the same batch have dead spots in each core but still meet the minimum standard to pass and preform fine. People are literally shocked when u tell them they print cpu chips in the same method lithography posters are made. And have no understanding of the nanometer topography thinking if it’s a 5 nm chip everything is literally 5nm. No. It’s the wavelength of light able to lay down and create smaller transistors and stuff.

Yeah, I switched to using them as they're the best supported by the open source FPGA tools

This machine used for so many types of experiments! They do a lot of semiconductor development work there as well, they currently hold the world record for fastest transistors!

This one worked, so it was more about being able to see inside than trying to diagnose a problem

Yeah, single photons!

Definitely doable, I recommend www.youtube.com/@RobertFeranec

Apply for the grant and check out tinytapeout

@@ZeroToASICcourse went to that page a few times and i didn't noticed the grand , thank you soo much!

I can't! I don't know anything about building CPUs with graphene!

Only down to the top metal. See Bunnie Huang's post for details. And way lower resolution.

Ultimately no, but they had to cut the die to fit it into the sample holder.

We used an energy of 6.2 keV (wavelength of 2e-10 m). This energy gives good contrast for samples of this thickness and composition, plus it's where we have the most photons at our instrument at the Swiss Light Source.

@@NickPhillips-cy5ng Thanks!

@@NickPhillips-cy5ng Interesting. This energy is almost ideally detected with cadmium telluride 2-dimensional detectors as used in medical applications. Was this in your set up? Curious to learn more.

@@ghlscitel6714An Eiger photon counting detector was used with a silicon sensor. This particular detector is an in house development, although it is similar to commercial detectors made by Dectris.

@@NickPhillips-cy5ng The amazing Eiger 🙌

Yes you can. The reason the researchers are doing this is to check that the chip that is manufactured matches what they get back. To make sure no back doors were secretly inserted by the manufacturer. But with all the 3d information, you could rebuild the whole netlist and reverse engineer the CPU. It would be a mammoth task for modern CPUs though!

maybe a CAL scan? T stands for tomography, and here we used Laminography.

I hope you're joking! Otherwise, try reading "The Ten Most Beautiful Experiments" by George Johnson

@@ZeroToASICcourse i hope your joking but then your probs a woke liberal with the intelligence of a slug and cant think for yourself you have to let everyone else do it for you , i feel sorry for you.

Yeah the foil looks very hacky. I think it's because to get very high vacuum they have to heat the machines, and then the foil helps keep it warm.

The actual imaging process is the interesting part.

yep!