aye i was just watching that

@Supreme the large-ish black boxes used in the breadboard computer series are integrated circuits, essentially a packaging around the actual logic gates to make it possible to handle as a human. There's a tiny assembly somewhere in there with the actual logic gates, connected to the IC's outside connectors via tiny wires. The logic gates in a modern CPU are even more miniaturized, of course. As for where they are in a CPU, well, they pretty much make up the entire thing, storage (lots of caching going on in a modern CPU, also some microcode) and wiring connections (most of the cpu's package is filled up with wiring that connects to the connectors on the bottom; the actual cpu is only a few square centimeters in the center) aside.

He’s fake. He admits he uses boards.

If you really want to know then check out Ben Eater he builds the various pieces of a computer on breadboard and over several videos you start to see and understand how computers do their thing. After watching and realizing how much goes into the simplest of tasks it really puts into prespective how amazing something like the smart phone is. It's truely magic.

lower? so...Algebra

10101010110011001010111011101100

you know, i think on the level of binary digits these things have structure of boolean algebra, that is kind of abstraction over physical device, ( like usually math)

Some is boolean algebra, which is then broken down to transistor levels. Most transistors use Silicon in their construction, hence, "Silicon Valley". Other's uses more complex circuits, which those can be broken down to boolean algebra, etc, etc

He probably broke some rule by writing something else than c with it.

Autism doesn't have medicine, KiloSierra.

C sharpie

i feel u man :P

after all it is usually the longest one. back when i was in school some teachers would do this and it was awkward or funny at first but it makes some sense.

GoodOlKuro its also held to be rude to point with index

also is in the middle of the hand.

At least he didn't point with the V sign.

I used to point at things on paper with my middle finger, until my friend start correcting my every time i used the middle finer, and now, i no longer do it lol

Tiikoni And maybe also that the execution of a pipelined instruction may override the value of a memory address already read by the fetch module? In this case a partial flush is also necessary, I think. Although it must be noted that changing the code section of memory is not a "usual" thing to do.

This is exactly why it is a bad habit to use "'goto" in programming languages....

That's what branch prediction is for

Neural networks ftw

@Flankymanga That's not the problem with goto. Need an if() statement? That's a jump. Need a for() loop? That's a jump. Need to call a function? That's also a jump. The problem with "goto" is that it makes code hard to read for puny humans.

Fabian Neundorf , Can you link that video? Id be very interested to see it.

please link that video ;-;

PureMotionHD well in my reply I linked it. if it doesn't show up, search for "Ben Eater" who is the uploader.

More universally, Symmetric Multi-Threading (SMT). Edit: sorry, *Simultaneous* multithreading (SMT)

Yeah, but you'd need a CPU with more instruction level parallelism if you want SMT to make sense then what this example provides.

SMT means Simultaneous multithreading

Xei Yes, thanks for the correction!

I'd suggest out-of-order execution

skeptic youravg so where did you study and what (from someone genuinely interested in the career)

Electrical Engineering (courses in computer Arch & Digital design).. Arizona state univ..

Cheers! I worked for ARM Gemany about 7 years ago. In the simulator group. They had a just in time ARM to x86 translator (done by a goup in the UK) and a GUI tool to build entire SoCs from ARM parts (done by us). You stiched your SoC together in the GUI and a simulator of that system was built by generating code and compiling it to an executable. Interesting stuff. Sadly they closed the site.

ARM is hiring like crazy right now..plans to double in the UK in the next few years..You can still make it back :)

Look up Ben Eater here on YT and look for his Breadboard Computer series of videos. He's fantastic at simplifying the complicated.

What assembler did you use? I didn't think the Commodore 64 had an assembly monitor in rom like the Apple 2 did.

and being displayed on an Atari monitor, sweet.

Just adding more transistors doesn't increase the speed, but some programs can be structured so that several parts of the program can be run at the same time, only in different parts of the CPU. In that case, "more transistors" equals more "cores" in the CPU, allowing it to literally do more than one thing at a time. But as you guessed, this does not increase speed where all parts of the program have to be run in sequential order.

This is actually why CPUs have multiple caches in series and parellel; The instructions and stack variables tend to be towards one end (or both ends) of allocated memory, while heap variables are towards the other end (or the middle). While the bubble can still exist, it's toned down many orders of magnitude, and still allows the possibility of treating instructions and data interchangably.

Cool, so I was half remembering correctly... It's been a while, so that's kinda cool to know :)

Btw, I searched on the ARM infocenter site first, but the Keil explanation was the best I found.

The (original) ARM processor used 32 bits (4 bytes) to encode its instructions unlike the 6502 which used 8 bits (1 byte) to encode its instructions (a lot of bit patterns were not used). The 6502 used synchronous memory access - every clock cycle it read/wrote memory, and so used a single byte program counter pipeline - the next byte of the program (instruction/data) was being read: in his example of A9 43 when the A9 was being decoded the 43 was loaded, executing the instruction shifted the 43 to the A reg so whilst that was being done the next instruction 20 was being read in, and so on. The biggest problem with bubbles (in the pipeline of the 6502) was branch instructions - they could take 2, 3 or 4 clock ticks to execute (2 if no branch, 3 if branch to memory with the same page number (top 8 bits of address), 4 to a different page). Most instructions take 2 clock ticks plus extra tick if absolute addressing (3 bytes long) plus extra ticks for different addressing modes (causing bubbles). The ARM processor executes near enough 1 instruction per clock tick by avoiding branching (bubbles in its pipeline) by using some of the 32 bits of the instruction as a condition - the instruction only executes if the condition is met (there is the condition TRUE which means the instruction is always executed). I'm trying to remember but i think the 32 bits may have included memory addresses and immediate data.

It's always starts at address 0 or some predefined address I guess

Register not cache

"Register not cache". registers can be considered cache too.

It was mostly just marketing. The same CPU running at double the MHz can theoretically perform calculations twice as fast. But you can also design the CPU to do more at slower speeds. It's no longer a thing because a) consumers realised that MHz only tell part of the story, and b) higher frequencies are exponentially harder to keep cool and stable

Basically to increase clock speed you need to pack transistors closer to each other, as well as evacuate the heat from smaller volume, and physical limits have been approached

The CPU doesn't "know" anything. Usually, in a Windows system, the CPU has to run a sub-program which translates the numeric value into the graphic for that letter or other character (eg 65=A).

I think you mean 8*15 bits but i see what you mean (:

Oh, right, but possibly 8^15 different instructions o.O

I agree. Is it any faster to use smaller size instructions for the simpler, more common instructions? But why does X86 need such huge numbers of instructions?

I'd suggest as a primer, Ben Eater's Breadboard Computer series here on YT.