New Tools, New Possibilities - 3D Printing for Lab-on-a-Chip | Greg Nordin | TEDxBYU

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What we can do in technology is defined by our tools. If we want new possibilities, we need to create new tools. Greg Nordin was looking for a breakthrough new method of making lab-on-a-chip devices, in which a medical diagnostic or bio-research laboratory is reduced to the size of a small chip. What he and his group came up with is a new tool for directly 3D printing lab-on-a-chip (also called "microfluidic") devices.
Greg Nordin, a professor in the Electrical & Computer Engineering Department at Brigham Young University, has spent thirty years developing new technologies based on micro- and nanofabrication processes. He loves the challenge of creating new capabilities to benefit our everyday lives. For the past fifteen years he has focused on inventing devices for health-related diagnostics and research. In addition to his technical work, Greg loves the outdoors, including off-road motorcycling, mountain biking, and trail running. Greg earned BS and MS degrees in physics from BYU and University of California, Los Angeles, respectively, and a PhD in electrical engineering from the University of Southern California.
Greg Nordin, a professor in the Electrical & Computer Engineering Department at Brigham Young University, has spent thirty years developing new technologies based on micro- and nanofabrication processes. He loves the challenge of creating new capabilities to benefit our everyday lives. For the past fifteen years he has focused on inventing devices for health-related diagnostics and research, recently culminating in creating a 3D printer and related new materials specifically designed to fabricate medical diagnostic laboratories on tiny chips. In addition to his technical work, Greg loves the outdoors, including off-road motorcycling, mountain biking, and trail running. Greg earned BS and MS degrees in physics from BYU and University of California, Los Angeles, respectively, and a PhD in electrical engineering from the University of Southern California. This talk was given at a TEDx event using the TED conference format but independently organized by a local community. Learn more at www.ted.com/tedx

Пікірлер: 21
@tanveersingh8290
@tanveersingh8290 4 жыл бұрын
Just some mind bending stuff this video deserves more views.
@Top10MusicLists
@Top10MusicLists 6 жыл бұрын
This is incredible. Can't believe what these guys were able to do.
@emmanueloluga9770
@emmanueloluga9770 2 жыл бұрын
The future can truly be revolutionized.
@jonabirdd
@jonabirdd 4 жыл бұрын
A printer on a desk used to make a lab on a chip. Pure awesome.
@hadisvakili9186
@hadisvakili9186 5 жыл бұрын
Fantastic
@darthvader5300
@darthvader5300 4 жыл бұрын
Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope! In the early 1980s CMOS being explained in this way is different to what we personally got from a Japanese engineer who said "basically CMOS is more like a layering process but you must first determine what you need so that you will know exactly what is needed to be done first" It is like creating a multi-layered cake. That is the problem with education today, they try to make things unnecessarily complicated and sophisticated when they can make their explanation so simple WITHOUT LOSING THE GIST OF THE ENTIRE SUBJECT itself. This is why Japanese education is far more effective to the point that they made CMOS technology so simple that it allowed them to use simple designs, larger size components, and compensate by using larger size silicon chips the size of small average letters. They did that in the early 1980s which is why they have beaten the U.S IC chip makers in the international market competition. Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope! Now with maskless ion beam lithography and electron beam lithography and hybrid ion beam-electron beam lithography using laser guided guidance systems for positioning and alignment, they have made CMOS far effective in cost effectiveness and achive zero defects/zeo rejects status.
@gregbrown5554
@gregbrown5554 5 жыл бұрын
I've been pondering this type of technology for many years.
@PacoOtis
@PacoOtis 4 жыл бұрын
Wow!
@darthvader5300
@darthvader5300 4 жыл бұрын
Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope! In the early 1980s CMOS being explained in this way is different to what we personally got from a Japanese engineer who said "basically CMOS is more like a layering process but you must first determine what you need so that you will know exactly what is needed to be done first" It is like creating a multi-layered cake. That is the problem with education today, they try to make things unnecessarily complicated and sophisticated when they can make their explanation so simple WITHOUT LOSING THE GIST OF THE ENTIRE SUBJECT itself. This is why Japanese education is far more effective to the point that they made CMOS technology so simple that it allowed them to use simple designs, larger size components, and compensate by using larger size silicon chips the size of small average letters. They did that in the early 1980s which is why they have beaten the U.S IC chip makers in the international market competition. Do the Japanese way of the early 1980s. Use larger size components and simpler designs along with the CMOS technique which is a cake layering method of making silicon IC chips. Instead of an IC chip the size of a postage stamp, your IC chip will be the size of a large size 12" by 18"envelope! Now with maskless ion beam lithography and electron beam lithography and hybrid ion beam-electron beam lithography using laser guided guidance systems for positioning and alignment, they have made CMOS far effective in cost effectiveness and achive zero defects/zeo rejects status.
@mechadense
@mechadense 2 жыл бұрын
8:06 Hua Gong "intimately involved in making the printer"
@mechadense
@mechadense 3 жыл бұрын
12:20 OpenSCAD FTW :)
@Eors
@Eors 5 жыл бұрын
Technology makes life better'
@AlecAkin
@AlecAkin 4 жыл бұрын
This is Nobel Prize worthy for sure
@badallmann
@badallmann 3 жыл бұрын
crispr-on-a-chip
@Cacti_hipster
@Cacti_hipster 3 жыл бұрын
How long until they are 3D printing human scale full cardiovascular systems, growing organs, and simulating human-like consciousness through machine learning all tied together with skin like sensors calibrated for prosthetics? Cylons anyone? Edit: Sidebar, I am not an expert in any of these areas just a 20 year old with some curiosity
@theconsciousobserver6829
@theconsciousobserver6829 3 жыл бұрын
They made an ear already
@jonkelly5562
@jonkelly5562 3 жыл бұрын
This is what Thermos was supposed to be.
@emmanueloluga9770
@emmanueloluga9770 2 жыл бұрын
Indeed
@sweloegaming3190
@sweloegaming3190 6 жыл бұрын
I'm thinking of other applications to become rich.
@SynthToshi
@SynthToshi 5 жыл бұрын
cryptodaddys could use this....
@sharadkumarsingh8972
@sharadkumarsingh8972 4 жыл бұрын
12 Comments on a 12K views video
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