Loved the lectures, love you Sir

I just design my own powerful LDO now and this video is very helpful for me. Thank you very much!

This is great! This is such a surprising complete amd usefull videolesson. The clear comparisson between the different logical designoptions with which it begins, oh i think, more insightgiving brought, with usefullness in mind, more is not possible

so good thank you professor

Es ist sehr gut 👍 Danke 🙏

Professor, Correct me if I missed something, but I'm surprised the parasitics of transistors were not brought into consideration. When designing with P-channel vs N-channel the loop tuning has to take into account Ciss, Coss, and Crss. In most applications this doesn't make a big difference, but in pulsed applications that high frequency tuning can play a critical roll. Love your videos, thanks for the great content!

Thank you for an insightful analysis. Now I am only wondering how would the NPN-mode regulator stand against the PNP one, concerning its ability to react to a quickly changing load (e.g. a micro controller going from sleep to full speed and back to sleep again). Intuitively, it seems to me, that the NPN transistor acts like an emitter follower before the op amp reacts to the change, therefore the voltage drop due to a sudden change might not be as deep as in the case of PNP, because bandwidth of a transistor would be much higher than that of the whole feedback loop. But is this phenomenon practically significant?

Very informative. I was a little surprised that at 25:31 the Vin PSRR above 300 kHz seems to actually be increasing the power supply noise rather than decreasing it. Am I seeing this correctly? This would obviously be very unwelcome behavior in many applications...

👍👍💖👍👍

This led me to another mystery that's been puzzling me for years: If I used op amp directly as a stabilizer, I would run into problems with its stability because of capacitive load of all the decoupling capacitors it has to feed. In the datasheets of most linear voltage stabilizers, on the other hand, one can read a minimum capacitor value required at the output, to achieve stability. Is this because of the effect of output transistor or is the internal op amp somehow frequency-precompensated to allow stable operation with high capacitive loads?