The LPDDR4 standard was created to address the need for increased memory bandwidth in low-power, high-performance smartphones and mobile devices. This webinar explores different methods of connecting the multiple channels of DRAM into the SoC, including operating all the channels independently or joining some of them together. It discusses the tradeoffs in SoC floorplans, logical to physical addressing, connecting to on-chip buses, and low-power methods as they are affected by the multi-channel connections to LPDDR4.