He really explained better than one hour college class

It's crazy to think that moving the data in a traditional VN architecture system is 2000x times more energy intensive than the actual computation.

Awesome video.

thanks

too much fast

I feel like there’s about 99% than what’s discussed here, but this was still a bit helpful.

Thank you so very much Steven 🎉 its so very informative. Numbers and spécifications you provide are so valuable, thanks again!!! 🙆

Thank you Mr.Gideon for your informative video!!

This serves as formal notification of the successful receipt of the BTC transaction.

Fascinating. I wonder if there's any memory degradation over the eFPGA reprogramming cycles?

This is great to watch because my PhD thesis work is on cryogenic MRAM for embedded quantum computing hardware. Thanks for the video :D

Lot of hand waving. Such is the beast the cloud is. Very fluffy and vague vapor. This was five years ago. Things have moved a lot in these five years. I hop you do another video on where we are now on this issue.

Where can I get a tsmc28nm HBM phy?

Great video!! Thanks!

Thx for sharing Doctor Fried. Do we use "Mahalanobis Distance", etc. to optimize "Process Window Optimization"?

Fantastic, but l have aquestion How l use inkjetprinting for printing sensors

What about interface considerations? Do you design for specific interfaces?

I have an solid state analog transmitter of 85 Kw (LARCAN) working uninterrupted for almost 35 years. I am really impressed about how these MOSFET(MRF151G) are still working at maximum RF power without any kind of maintenance.

A GPU made with HMB memory for working memory and GDDR6 memory for a second teir of working memory and background memory. a graphics card like this would be so fast.

Hello there, Analog layout engineer here and I’m watching this in 2024😂, fuck the future robots who gonna replace VLSI engineers,

@2:25 T0 - T1 ? -> since we are talking about Delta on arrival times, should it not be negating, rather than adding? Thanks much for the video !

Density is becoming an issue with reliability. Too much density causes bit flips

Not enough videos and documentation explaining these techniques . Thank you for uploading

Great. AI Clusters seems to be limited by GPU memory and rack bandwidth, so an increasing fraction of silicone and power will go into communication. So great to hear that optics can save a lot of power.

interesting. SO moving from tripling the whole computer , to tripling the critical parts in the IC and leveraging development for faults tolerance from automotive chips.

I was taught to be almost paranoid with ESDs when handling chips and boards, but hearing how much engineering goes into the indented discharge paths goes, explain why people being more casual with their handling still are able to build working devices.

Insightful

Superb

Thank you for your input. This video helped me understand where I need to focus my effort as a backend engineer for timing related issues.

Next video why chips age

Great stuff gentlemen. From a custom fiber cable assembly house perspective, this is very interesting

Very informative!

Great that we get this for free! Have seen some really interesting ideas in this space

How to add this SDC to the simulation?

Super interesting and informative video, thanks!

Very interesting considerations to think about. Many thanks 🙏

I will sleep less ignorant today.

Thanks for visiting us Ed, and looking forward to many future discussions!

This looks like cut tree and partitioning

Great insight 👍

Wow! What about SMEE?

Excellent Video. Shed light on a few things I was wondering about. Well explained.

Thank you for this wonderful explanation

thanks for you guys's effort to this great video.

Does the fact that high NA EUV is anamorphic mean on axis has higher resolution than the other?

Very interesting technology explanation - awesome

thanks for posting this

So we gotta update the routing algorithms for curvy linear design

Interesting 😀

Wow!