Jairam Gouda

4:36

16. 7T SRAM Cell | Integrated Circuit Memories

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16:42

15. SRAM Cell Stability | Integrated Circuit Memories

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12:02

Design Technology Co-optimization (DTCO) | VLSI

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10:59

14. 6T SRAM Cell Write Operation | Integrated Circuit Memory

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9:23

13. Read Operation of SRAM Cell | Integrated Circuit Memories

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8:14

12. Introduction to 6T SRAM cell | Integrated Circuit Memories

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6:14

11. Memory Array Architecture | Integrated Circuit Memory

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4:30

10. Introduction to DRAM | Integrated Circuit Memory

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4:21

9. Introduction to SRAM | Integrated Circuit Memory

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3:32

8. Introduction to Read write memory | Integrated Circuit Memory

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7:33

7. Flash Memory | Integrated Circuit Memory

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3:48

6. Electrically Erasable Programmable ROM (EEPROM) | Integrated Circuit Memories

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5:01

5. Erasable Programmable ROM (EPROM) | Integrated Circuit Memories

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5:55

4. Read Only Memory (ROM) | Integrated Circuit Memories

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7:22

3. Classification of Memories | Integrated Circuit Memories

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5:51

2. Memory basics | Integrated Circuit Memories

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6:32

1. Introduction to Integrated Circuit Memories

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8:31

Clock Reconvergence Pessimism Removal (CRPR) | STA

2 жыл бұрын

9:05

Pins, ports and interfaces | VLSI design

2 жыл бұрын

14:40

Parasitic Extraction and Back Annotation | VLSI Physical Design

2 жыл бұрын

9:47

Concept of Mutex | Software and physical design (IR drop) perspective

2 жыл бұрын

16:46

Timing path | Slack or Margin and other terminologies

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10:16

Timing Arc in STA | Delay calculation

2 жыл бұрын

10:11

STA in ASIC design flow | Accuracy of STA

2 жыл бұрын

9:35

Basic terminologies in STA | Static timing analysis

2 жыл бұрын

7:40

Difference between STA and Dynamic timing analysis | STA vs DTA

2 жыл бұрын

10:01

Introduction to Static Timing Analysis | STA , Physical Design, Synthesis in VLSI

2 жыл бұрын

3:33

What is overlay in Integrated Circuits ? | DFM

2 жыл бұрын

14:12

Design for Manufacturability (DFM ) | DRCs, Dummyfill

2 жыл бұрын

Пікірлер

@pg9958 14 күн бұрын

thanks it was very helpful

@ravisagar6554 18 күн бұрын

Really not understand the main difference

@user-zc2wk8cz4o 23 күн бұрын

Hi in your simulation you can see immediately the input and the output, but my simulation gives me the graph after a long time, do know where the problem might be?

@sangeshs944 Ай бұрын

very informative

@DivyangaS-z4q Ай бұрын

You have mentioned the hold equation the opposite way. T(clk-q) + T(comb) > T(hold)

@pavi5115 2 ай бұрын

Very good explanation

@damlacanatc2949 2 ай бұрын

HELP ME

@user-jo3wp9ef4w 3 ай бұрын

First of all BCD is equivalent to Decimal number correct your title

@user-zo4wd3eb4s 3 ай бұрын

bad teaching.totally useless

@noellim2062 3 ай бұрын

Thank you.

@tejaswini7520 3 ай бұрын

You are amazing👍

@tejaswini7520 3 ай бұрын

Thank you🙏

@azamat_bezhanov 4 ай бұрын

how many gates in gaafet transistor with backside power delivery

@harshatpant 4 ай бұрын

Thanks for the video. Do you have one discussing the timing requirements for the ICGC cell? Even with the negedge latch, the enable cannot be toggled very close to the posedge of the clk.

@quantum3075 4 ай бұрын

Thanks

@thrishnajakrishnan600 4 ай бұрын

How can we know that the contact resistance are in parallel

@vlsi_podcast 5 ай бұрын

Hii...I have been looking your content and explanation. these are very understandable. Can you please do on the topic of slack and calculations related to it.and also remaining Indepth concepts of pd.

@user-bi6ko5te8g 5 ай бұрын

Hi- How high Vth cell are low power cell ?

@EngineerVijitaaDas 4 ай бұрын

Yes

@alisiddiqi1 5 ай бұрын

Thanks for the video. How are you getting negative swings in the output using a single (+ive) power supply?

@vincentjr8013 5 ай бұрын

Can anyone tell me how palladium emulator emulate a design ?

@vicheakeng4884 5 ай бұрын

1:40 1990,1992, 1994. What is on first, who's on second.

@ashutoshsrivastava303 6 ай бұрын

Really good video! Would it be possible for you to make an over view video on what are the different types of software (EDA or physics based) used during the design process and where they are used?

@HarNilBandhiya 6 ай бұрын

Thanks 🙏🙏🙏 for great explanation

@rajavikrampullem7583 6 ай бұрын

Superb explanation bro...

@AbishekBK-vs7rc 6 ай бұрын

sir i am not able to get uniform decoder, uniform encoder, and analog design filter components in the library browser

@HarNilBandhiya 6 ай бұрын

Very good explanation

@bhavanadhaker3597 6 ай бұрын

Sir your explanation is so good.👍👍 I found this video after watching 9-10 another senseless videos

@user-lb4yp1wi1r 6 ай бұрын

Thanks Jairam :) This is a very helpful video :)

@MusaYmc 7 ай бұрын

It would be much more useful if you could include CMRR PSRR calculations etc.

@easylife7682 7 ай бұрын

One of the best videos on Asic design flow

@timothydahlin5321 7 ай бұрын

Good presentations. Thanks for posting these videos.

@Gohar0507 7 ай бұрын

Thank you so much. It is really helpful ^^

@mmvvxxl4728 7 ай бұрын

can't understand

@elijahmikaelson8027 8 ай бұрын

You didn't explain the second part well enough....first part was fine

@Aniltiwari-zi2fu 8 ай бұрын

What if the antenna violation is on the topmost layer??? How do you solve antenna violations for vias?

@seguiadorfolowinefilox1329 8 ай бұрын

Could you provide a Google Drive file with the model MOD? The process has changed, and it now involves multiple files instead of just the model. The video is outdated, and I need the updated files.

@somnathpaul1993 8 ай бұрын

Thanks, Jairam for the video. Appreciate your effort.

@sohailbarishams5574 14 күн бұрын

Thank You Sir

@saharatan7261 8 ай бұрын

More visual representation, interlinking between different topics will be good along with Industries current view. Power, Logic, Memory's and RF DTCO are complexly deferent, we clearly should present without using catchy words.

@azamat_bezhanov 4 ай бұрын

how many gates in gaafet transistor with backside power delivery.

@user-wb4xy3zw7y 9 ай бұрын

Can you post the tutorial

@vbag42 9 ай бұрын

1:30 so u r saying if voltage at gate is 1, the output from drain will be 0.

@TAMMALIAJAYKUMAR 9 ай бұрын

can you please explain why you have written mov ax,data mov ds,ax and lea si,x

@CaptainIndia-jt8sc 10 ай бұрын

But sir, how to determine threshold voltage ?

@noatlantis980 11 ай бұрын

Very good video . Learned a lot through this series so far.

@mohamadfahmibinmansorstude6570 Жыл бұрын

bro the pulses uses is the same all 4 trans.. how its control the switching to differentiate the flow during the positive sequence and negative sequence.??

@selvakumar-cq2zb 2 ай бұрын

they have given 0.5m delay