Crosstalk issue and prevention techniques | Crosstalk delay | Shielding of net

Crosstalk issue and prevention techniques | Crosstalk delay | Shielding of net | part-2

Рет қаралды 12,795

4 жыл бұрын

Crosstalk is an important issue in lower technology node and high-speed ASIC design. What is crosstalk, How crosstalk occurs, and What is the effect of crosstalk, What is crosstalk noise, what is crosstalk delay, How to prevent crosstalk, All these points have been discussed in this session.
Started the discussion in continuation with the previous session, Crosstalk glitch, crosstalk delta delay, effects of crosstalk delta delay, effects of multiple aggressor net on a single victim net and in last discussed the prevention techniques for crosstalk.
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Your queries/suggestions are most welcome in the comment section.
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VIDEOS IN THIS SERIES
1. Latchup issue:
• Latch-up in CMOS Tech...
2. Latchup prevention techniques
• Latch-up prevention in...
3. Antenna effect:
• Antenna effect in VLSI...
4. Antenna prevention techniques
• Antenna Effect Prevent...
5. Electromigration issue in ASIC
• Electromigration in VL...
6. IR Drop Issue in VLSI
• IR Drop issue in VLSI ...
7. On-Chip variations
• On-Chip Variation in V...
8. Crosstalk effect in VLSI
• Crosstalk issue in VLS...
9. Crosstalk prevention
• Crosstalk issue and p...
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#Crosstalk #CrosstalkDeltaDelay #CrosstalkPrevention

Пікірлер: 39

@maltikumari8677 4 жыл бұрын

Very helpfull, very clearly you have described each and every step ..

@TeamVLSI 4 жыл бұрын

Thank you @Malti, Its our pleasure. Keep watching, commenting and sharing. There are lots of video similar to this in our channel.

@MBm107 Жыл бұрын

why we only shield for top metals even through same net connected from lower metal to higher metal

@TeamVLSI Жыл бұрын

Sorry, I am not much sure about your query, but fact is longer the length and victim and aggressor interaction , higher would be crosstalk and requirement of shielding is high there.

@chintu494 2 жыл бұрын

Sir, Nice explanation sir... one query sir that how asymmetric signal triggering helps to reduce the crosstalk induced delay in interconnects? Thank you sir

@rbhavsar 2 жыл бұрын

Nice explanation sir. One query which is not discussed in video. What will be effect of crosstalk on common clock path.? I mean to say if any crosstalk effect occur on common clock path then how timing will be effects.? Please clear it. @Team VLSI

@TeamVLSI 2 жыл бұрын

I believe there will no impact on the timing calculation if crosstalk is on the net before the common clock point.

@aakashek8526 4 жыл бұрын

Tjank you very much sir

@TeamVLSI 4 жыл бұрын

Most welcome

@Akk-ei9uw 2 ай бұрын

can you suggest a tool to find out crosstalk in the layout drawn? is there any opensource tools? What will be its input?

@Narennmallya Жыл бұрын

but sir in prevention technique, increase drive strength of victim, for slew reduction and fast switching---> wont it impact on more dynamic power dissipation and also leakage? Let me know if thats the tradeoff between crosstalk and power in this scenario

@habibakhatunnesaragi6259 4 жыл бұрын

Which text book is good ....for this kind of topics sir.ur explanation is best sir.

@TeamVLSI 4 жыл бұрын

Hi Habiba I mostly refers the class notes of various eminent professors all over the world. Initial days of my M.Tech I read almost all good books in this field but currently I do not get time to read all those. Some reference books are mentioned in the description of video. Thanks

@vamshireddy9392 3 жыл бұрын

sir,this video very helpful but i have a doubt that why inductive coupling is not considered pleases explain

@TeamVLSI 3 жыл бұрын

Because is has negligible effect.

@vamshireddy9392 3 жыл бұрын

@@TeamVLSI at high frequencies like 20ghz is there any effort?

@nishadpadariya5341 3 жыл бұрын

1. which is more effective to avoid crosstalk effect, NDR or Shielding ?

@TeamVLSI 3 жыл бұрын

I think, Shielding.

@Narennmallya Жыл бұрын

so negative crosstalk is actually improving the design?

@venkateshsanagala8287 4 жыл бұрын

Sir can u upload some videos on analog layout

@TeamVLSI 4 жыл бұрын

Hi Venkatesh Check the link bellow of previously uploaded some videos on layout design in our channel. kzfaq.info/sun/PLC7JCwKQnjL5fR-0F8DPZYUbZVG81PC5E Right now I am working on digital design only.

@venkateshsanagala8287 4 жыл бұрын

@@TeamVLSI sir I need complete information on some topics like matching, STI,LOD, floor planning steps

@TeamVLSI 4 жыл бұрын

Sorry Dear, I have not much more experience on said topics

@pavanibanoth7774 4 жыл бұрын

Hi Sir, How can we identify which net is acting as aggressor and which net is victim?

@TeamVLSI 4 жыл бұрын

Thanks Pavani, for asking a really good question!! Kindly read the comment section of this video, We have already discussed this question with Pavan.

@bhanukallepalli2676 4 жыл бұрын

Hi Sir, Very nice explanation. I have one doubt.. When we use ground as shield. There will be a chance we will get potential difference between victim and shield net then the cap between this will not try to charge and create negative glitch in victim node? pls help me understand this.. Thanks

@TeamVLSI 4 жыл бұрын

Thanks Bhanusri. The question is not very clear to me. What what is understood on that basis I would say. 1. Yes a varying potential could developed between the grounded shielding net and victim net as well as aggressor net if victim or aggressor net is not at constant low. 2. There will be mutual capacitance also. 3. But the shielding net is strongly connect to ground, So it is not easy to create any glitch in the shielding net. Hope I have answered you doubt.

@bhanukallepalli2676 4 жыл бұрын

@@TeamVLSI @Team VLSI Thanks for the reply. My question is related to what you have explained only. But as regard your reply: 1. Why strongly connected ground can help us? or how we are getting advantage by connecting shields to DC Voltage?

@TeamVLSI 4 жыл бұрын

Because if a net is connected directly to VSS or VDD it's potential could not be changed by the other signals due to strongest crosstalk.

@bhanukallepalli2676 4 жыл бұрын

@@TeamVLSI okay got it. Thanks

@habibakhatunnesaragi6259 4 жыл бұрын

Sir have u explained any placement ...with any vedios kindly share sir.

@TeamVLSI 4 жыл бұрын

Not in details, explained just in brief in the bellow link. kzfaq.info/get/bejne/iqqmpJSZu77egpc.html

@pavankumarVilasagar 4 жыл бұрын

On what basis, Tool decides aggressor and victim nets?

@TeamVLSI 4 жыл бұрын

Hi Pavan, I have logic on mind, but let me verify first. Meanwhile you can let us know what you think.

@pavankumarVilasagar 4 жыл бұрын

@@TeamVLSI I think, in the timing window, whichever signal has better slew(fast switching) will become aggressor.

@pavankumarVilasagar 4 жыл бұрын

What is your logic?

@TeamVLSI 4 жыл бұрын

Hi @Pavan Consider following situations 1. If a net has constant logic than it will not be an aggressor. Will it be victim? --> depends on the effect of aggressor on it. 2. Two very close nets switching and having almost equal slew rate. Can both be victim?? or both aggressor?? I think YES. Since we have issues with victim nets and have to fix the victim nets only. So the algorithm should consider each net as a victim run the analysis and find the effect of crosstalk on it and report each critically affected nets. "These are my opinions, What is the exact algorithm for the tools, I have not got a chance to see this "

@pavankumarVilasagar 4 жыл бұрын

@@TeamVLSI Nice explanation