FPGA #19 - A look at the iCE40 Technology Library

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Күн бұрын

Related Github repo:
github.com/johnwinans/Verilog...
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Пікірлер: 8

@DennoWiggle 2 ай бұрын

That is interesting about the SB_WARMBOOT technology block. I always learn something new in your video's. Thank you.

@JohnsBasement 2 ай бұрын

I thought it was cool when I first read about it too. I am looking forward to playing with it!

@ChrisJackson-js8rd 2 ай бұрын

looking forward to more detail on PLL :) it seems like almost all modern fpga's support some degree of live reconfiguration. but I haven't quite got my head around how that works mostly it seems to be used to reroute i/o, like in a dsp that might split bandwidth among different channels

@JohnsBasement 2 ай бұрын

The PLLs are pretty cool. The ICE40HX warm boot looks like it is a full reload & reboot. Fancier modern chips allow for partial-reconfigs where you can keep part of your design running while some other portion of the FPGA is reloaded!

@HylaTube 2 ай бұрын

Figure 5.1: D_IN_0,1 and D_OUT_0,1: those are not switched, are they? Would make much more sense to me …

@JohnsBasement 2 ай бұрын

The IN and OUTs are switched or the 0 & 1 are switched? I think it all looks OK to me. The 0 are on the rising edge and the 1 are on the falling. Right?

@HylaTube 2 ай бұрын

What I meant was, the D_INs look like outputs to me and vice versa. No? Amateur here … ;) Christoph

@JohnsBasement 2 ай бұрын

@@HylaTube They appear to be named from the perspective f the FPGA as a whole. So the D_IN is an output from the pin input buffer. 🙂