The way he explained that NMOS should be used in PDN and PMOS should be used in PUN was commendable.

I think some transistor capacitance videos are missing i am not understanding the vdd/2 concept ,and equivalent rc model and when did module 3 came from jumping from module1

When did we come across the concept - discharge from Vdd to Vdd/2 for delay purposes? Also, in which lecture equivalent RC model was discussed?

When pmos discharging why vgs=-vc(t) didn’t get plz explain

Why do we think in terms of NAND-NOR logic in CMOS?

I am totally confused in here ? Partially understanding everything when the concept of vdd/2 for delay purposes taught and when was equivalent rc model taught i did not came accross something like that plzzz upload the videos if anything is missed

i did not understand the expression for charging ..please someone could you explain...

Anyone struggling to find the VDD/2 concept can refer the Inverter 12 - Nmos Transistor ON resistance and Inverter 13 - Elmore delay lectures

Sir why is Vdd negative for PMOS charging?