do one in Silicon Valley!

secret guest?!?!? wait... you're having Dr. Cutress??? LOL Just a guess :)

If you want to do a killer podcast do one about the birth and death of Nortel. I use to work there.

Meet up in New York area one day?

Another encouragement to travel during a climate emergency? No thanks.

We all do.

Really? I wouldn't have guessed.

I like the stocks

He lives semiconductor

Semiconometery

The fact that photo rework works at all is almost as much of a miracle as lithography itself.

​@Grak70 the fact that any of it works is a miracle, and in fact most of these processes are constantly balancing on a knife edge of total failure.

@@xxportalxx. and yet they are accomplished on a massive scale with almost no failure - machines

@@Retrofire-47 Eh, no. There is a considerable rejection rate: IC's that simply do not function as a result of minute errors or contaminations. That is why testing is so important. If all were perfect, no testing would be necessary. These machines are not perfect, they are good enough to make money with them.

@TheEvertw yeaaaah, there's also a lot of what's called 'inked out' die (I think at some point in history this involved literally inking out a region of the photomasks or something along those lines, however these days it's just logged in the computer tracking system). This is done for various reasons but most often for particles, it's basically impossible to avoid particle damage completely so there's always regions inked out for them. For instance Epi will grow flakes in the reaction chamber that will fall off onto the wafer (there's also various stacking faults and growths), and implant will form like sedimentary buildup in the beamline that can chip off and hit wafers or get exploded by the high voltage electrodes/turbos/beam itself and shotgun the wafers. As for whole wafer scrap I've seen robots fail and up and literally just chuck wafers at walls and floors lol, you can etch a wafer too long if something fails and literally dissolve the whole thing, a clamp can chip a wafer which will cause it to explode under the pressure in chemical-mechanical-planarization, voltage sags in storms cause numerous fail modes including tools dumping vacuum and just dusting wafers (an utter nightmare to clean up!), temp probes can fail causing wafers to accrue stress fractures and later shatter randomly (hard to track down to root failure btw), the list goes on!

As a baker and father of three, I have to say: Omlette du fromage!

@@andyargentina7056 As a Dexter Cartoon fan, I have to say: Omlette du fromage

@@bebokRZly Dexter 😁

Mais oui!@@andyargentina7056

Aviation inspection I'm sure has some interests that would make a good video if the subject piques Asionometry's interest, which is wide (I know from oil rigs that insurance dictates many standards and QA checks, almost drive things in some industry more than I'd appreciated). Might explain how he manages to work 27 hours a day!

I want to do HR in this field. Would you be able to share any insight you have on the hiring side from actually working in the space?

I just finished the Nanomanufacturing and Microelectronics program last Friday. I'm currently looking for a company to start my career with. TEL, KLA, Micron, and Wolfspeed were some of the companies that gave us a presentation on what to expect with their company. Do you have any suggestions to be successful in this semiconductor industry?

Would you be open to an exploratory interview about the industry? I have this one project for this class you contributions would be helpful

Advanced packaging is where some of the next development is going on.

Is it a reasonable job?

​@@kayakMike1000If you like wafer fab mfg. , withstand stress as some of us works 12hrs a day, in 3/4 or 4/3 a week, 2-3-2 pattern and willi g to work changing shift, day or night pattern.

@@kayakMike1000 pretty much. I found it interesting as an operator, a technician, and as an engineer! The hours can be odd, if you're involved directly in manufacturing. A great deal depends on the culture of the company. My viewpoint is from US semiconductor companies.

​@@johnforguites4800shoveling a lot into a machine and wait for 60 minutes and then shovel it to another machine sure is the funniest job

​​@@ntabileSounds like an Intel shift schedule 👀 I used to be a contractor based in 42. Fun times!

Came to say the same thing… for an NMOS transistor, both the Source and Drain are doped with N-type dopants, while the body (where the Source and Drain sit, and where the channel is formed) is a P-type well (or more likely the entire substrate is doped to be P-type). In a PMOS transistor, everything is opposite. The body is a large N-well, and the Source and Drain are small P-type implants. The source and drain are always the same doping type, and the gate voltage induces a channel between the S and D of the same type, to complete the circuit

Was just thinking the same thing. We should repurpose all those chips and keep using till they die 😂😂😂

we do that every day, the five dollar normal watch you through out instead of changing the battery is as good as those swiss watches, just not made by hand and plastered with brand names to make them worth thousand times more than they are actually worth.

I must politely correct you on one point, I do indeed replace the batteries on my watches when needed. I believe in keeping a watch until the coil goes bad, and the cost of repair exceeds the value of said timepiece.@@thorin1045

Is that for real? 🤯

No way, do you have a source for this? This might be the coolest semiconductor manufacturing factoid I've ever heard if true.

I work in CD-SEM. what's up buddy!? lol

It'll come. He's halfway there.

Thanks for info. Source, Drain = same dope (P or N). Under gate = opposite dope (N or P)

Yea I was surprised with that too, first lesson into mosfets and our professor told us a MOSFET is a symmetrical device and the Source and Drain depends on the voltages we apply (contrary to a BJT trasistors which is totally an assumetricla device and has to be connected in a specific way).

The beauty of economic of scale.

Here for that, I may not understand everything about semiconductors but it really peeks my interest how tiny ass chips work

Waaaait... Care to elaborate?

@@Gameboygenius so, like 12, 18-25 y/o fashion entrepreneurs/executives/designers and students have a group chat where we religiously talk about the videos it’s so much fun

@@adambalapatel I'm surprised but glad to hear that. Makes me think there's hope for this world.

@@Gameboygenius lmao we’re just silly little guys having silly little fun

It beggars belief that fabs were even permitted to be considered in places like Texas and Arizona. Like I'm sure the tax situation isn't as unnecessarily favourable in, say Michigan, Ireland, Scotland, Denmark, Ottawa or anywhere on South Island NZ, but all of those other places have water, energy, educated populations and government support out the wazoo, why are the most geographically insane locations being considered over these intuitively easier ones? Is it exclusively tax breaks?

@TAP7a Yeah, why then that these 2 states were favored to have those new fabs build over there?

@@ntabile Tax breaks as inducements for building a fab in a state are a major reason, along with an educated workforce.

⁠@@TAP7a- Austin Texas had fabs there, for decades. People build fabs where existing workforce exists, so one does not need to import educated workforce from all over the place (very expensive.) Education is important, so is experience. A child growing up, hearing the war stories from their parents of early clean rooms, will have likely received a substantial informal education base that is intangibly important while layering on new technologies.

Someone was always going to point out the obvious.

@@OzMat Someone was always going to make an annoying replay

@nickj2508 Yes. My attempt at humour was poorly written. I have a lot of respect and admiration for anyone who has the intellect to understand the whole Semiconductor bizzo. So mate, from a construction worker in Australia, have a good day. 👍

I'm not sure about how wafers are sawed from the ingot, but the chips are cut out of the wafer using a laser, historically a saw was used, but laser is a more recent development.

It's not the case that ingots are sawed right into perfect wafers. After being cut, the wafers are lapped and then polished. In fact, there are typically several polishing steps that take place during IC production. That's because the removal of material during lithography and etching creates uneven surfaces, but later lithography steps require a smooth flat surface, so the wafer must be "re-planarized" at various points. As far as separating the wafer into chips, there are different methods: scribing and breaking, sawing, or laser-cutting.

Lithography is the result of applying an inked stone matrix on a sheet of paper or similar. Then you also have xylography if the matrix is made of wood, or chalcography if the etched matrix is a copper plate. So maybe we need a word like phanography if the etching medium is a type of lamp.

Good point. Photolithographed then?

@@DaveKeil sounds good. Where is the stone though (Gr: lithos)?

@@alainpannetier2543 - Huh. Never thought about it before, but the reticles are made of Quartz (if I recall right, or were) so they're in the stepper. Damn, maybe the whole thing isn't just some weird unfathomable naming convention the industry latched on to and ran with!

So you watched a 21min video in 3min?

He has A LOT of videos on ic. kzfaq.info/sun/PLKtxx9TnH76QY5FjmO3NaUkVJvTPN9Vmg

Somebody works in dicing

Send some wafers up that need some thermal oxidation.

Sputtering IS technically pvd, the same as how epi IS technically cvd. In a fab they get separated so that you can split up sections (and therefor workloads), as well as by product workflow (for instance often you'll have wet etch machines thrown into diffusion or epi areas, or diffusion machines thrown in with implant, etc.)

We do but mostly it is some form of witch brew that does something useful in the past. Microchip fabrication is in another level of complexity comparable to summoning the demon to do something for you.

Mankind and more specifically China has already experienced this catastrophic event. It or he was called Mao Zedong and his preferred tool for mass destruction was Communism. The Great Leap Forward, the Cultural Revolution, and the 100 Flowers Movement, between them claimed up to 80 million lives. Mao specifically had intellectuals killed or any person who demonstrated the ability or will for free or independent thinking. I dare say anyone or the type of person who watches this youtube channel would had little hope of survival in Mao times. I often compare Taiwan with it's 26,000,000 population and Communist China and its 1.4 Billion people. Taiwan os so far ahead of China in the technological level. It seems to me that mankind would be so much more advanced than what we are at present but for the likes of Mao, Stalin, Hitler and their likes. First rule of taking over a country, kill or imprison the intellectuals.

@@OzMatwhen I consider how far Taiwan, South Korea, Hong Kong and Singapore have come, and imaging a world where China was that advanced, it really does make you wonder. If China was as developed as her smaller siblings, the world would be so wonderful. It hurts to think about.

@@eedobee A very apt comparison, the 80 million chinese people killed due to the CCP insanity is a tragedy and a terrible loss for humanity.