How to build Shader Unit? LIke those GPU who got just introduced shaders into computer graphics

This was awesome!

the "skip" flag is a little bit obscure. are you using a modeling tool that does not match the hardware?

I just got reminded of you because I saw a video that used this software, and I saw you made some new videos. Nice to see you came back from the dead. lol

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!

FANTASTICO....UNICO...GREAT...!!🥰😍🤩👍👌

Wow this is seriously validating all those hours i spent in factorio

I understand what you are doing. But I can't understand why. Why you make the choices you do makes me think I need to know how the CPU functions in order to get the most out of this course.

ASCII = "American Standard Code for Information Interchange"

Thanks for introducing to Digital....your videos are amazing i am learning from them, wish to see more. How about a video on GPU or NPU a simple basic one.

i NEED the error handling video! i am really into pretty and graceful error handling, and am coincidentally also working with the pratt parsing algorithm

I started this series a week ago, realized I had no idea what was happening, and spent the past week giving myself a crash course in ICs and coding languages. It makes a bit more sense now that I've returned to it, but I guess I'm just not quite there yet on my journey.

@rj45Creates Why does the demux with input 1 lag (seen as light green wire) behind the PC out? Does it lag or is it wrong interpretation?

Great progress 👍

sometimes you seem quite a bit further than my skill level, and sometimes you seem a bit behind. so here is a suggestion and if you have engineered beyond it ignore the comment. instead of having an autosave, you may want to have two incase a crash occurs while saving. as in it might be possible for the save to be interrupted and the save corrupted. if you have a pair of files, then you can save over the older one, and have the newest loadable save load. there are three ways to do it, the one i just suggested. you could have the program detect if a save is corrupted, but that is just saying that a save is unrecoverable, and if you can do that you should be able to have a vallid working memory. the third way that springs to mind is to have alterations be an appended linked list, you could have it save every update instead of every seccond, that massively reduces the number of file updates. part of this is having a user action only count as an update if the user releases control. so they can drag a wire arround but only when they release the mouse does it update the file. if you do this the file can still be corrupted, but since you are saving a string of user inputs instead of computer state, what can be corrupted and lost will only be the last user action which will be corrupted. the combination of sequence of user operations, and objective circuit data structures, doubles the number of types of file but basicly eliminates the problem. if you fear partial corruption, due to like magnets not just power outage during save, the stack could have double the information technically necessary. lets say the file claims a user moved an 'or' gate from one position to another. if you save the starting position as part of the move, then you can have checks to see if there was such a component there. this gives better user recovery from a corrupted file. the file might say it was an 'or' initially, but the user's string of operations is saying it was an 'and'. this spreading of data across the file makes it grow a bit, but also a human reviewing it could make judgements about a corrupted file, which would mean there would be even less chance of irrecoverable data loss. if you have an objective data file and you try to minimize the file size then corruption can cause the entire file to become rubbish, like a checksum can tell you if a file got corrupted but it isnt really workable from there. but the more redundencies to data there are, the less capacity for catastrophic data loss. and data on disk is pretty cheap now. you could have files be 4 or 5 times the necessary size, but it may still be prefered if it means that the user loses 5 minutes of time instead of losing the entire project. again don't take this as personal criticism, maybe you went to this level and far beyond. i don't know. you mentioned you want this to be a tool. so another thing is to have save go to multiple places automatically without having to do raid. "what folder(s) do you want to save this in automatically". since my comment is about saving and fie size. being able to draw boxes on screen and give parts of circuits labels, which become new files with the label as the save name, and have those sub circuits to be able to be brought into your current project so you can both copy paste sections of circuits, and you can compress large portions of circuits when saving a file as "do this other file again here" would lead to some pretty extreme compression. a 'funny' way of using that would be to allow users to make circuits and if they are electrically identical, you can ask "is this a [half adder]" which would be one of the circuits saved in their file. this would allow people to test themselves if they can make a circuit by hand. another way the compression from having files link to one another can work, is you could have static references, which would be cross file copy paste, but you could also allow reworking the referenced file to also change the refering file, so you fix once and it applies everywhere once you open those files. the default would be the updates propagate situation as this is a cliche memory race, but you could also have the referenced circuit duplicated locally not just as the box being a reference, but something you can fiddle with and which get unlinked as a result. if you copy paste across files, and then you place any component in the box linked to any other component, it should unlink the reference from the save file turning [half adder] into [?] then when you delete the component restoring it to being a half adder it should say [half adder?] to indicate that it looks the same but is going to keep a local immutable copy of the circuit in this file with no external reference. compression for those who want it, and isolation for those who want it. pair having the abbility to reference designs you have in files with both having objective circuit descriptions and operation stacks which allow the reconstruction of save interupted corruptions, and higher detail saves as an option to allow in file corruptions to be manually corrected by users, and you have a strong base for the tool. is it a pain to have to do the single thing multiple different ways? absolutely, but not being able to lose your hard work on digital property would likely be pretty attractive to businesses. another kinda different thing you may want to consider is whether you can have multiple users. if you have the sequence of user operations save file, then you just need to put in tcp recognition, and also put in save points or restore points which are like every 5 minutes- whatever the tcp timeout is. and then put in a button which will restore current state from last known good file. this would balloon work, but it is one of those things which is easier to do if you decide to do it early on. making a single player game multiplayer is a pain late in development, but if you know you want that in the scope right away you wont optimize away from the requirement. if you want multi users for over the internet training, or for educators in conventional classes, that might justify using both saving and loading styles; files and data streams.

One tip with the auto save though- don’t go to crazy with it. Having done the same a couple of years back I trashed the SSD in my MacBook at the time due to quickly wearing the flash cells. Luckily that one was still changeable then being m2 nowadays all ssds are soldered on chips makes this impossible. I would make autosave a tunable feature allowing to turn it on/off and set a time or amounts of changes to occur before saving to disk. On the routing bit - it seems the router often draws multiple vertical wires on the same grid up until they collide in a corner just to then divert back horizontally and by doing so you can’t distinguish them either crossing each other or just two nets touching with two corners in a single point which makes it really hard to spot what’s going on.

I recorded a video in Digital today and was thinking about how cool it’d be to use Digilogic on the cutting edge.

I have a lot of experience with FPGA, the explanation is very confusing... An UART is very simple! When you know how things works it's easier to design from scratch...

Can someone explain me what software is this ??

I love this type of videos keep it up In the future you will definitely reach 1M ❤

why do you want to make a game engine? some people like the problem solving aspect of it. others like the social membership aspect; they like making game engines or programming languages because it helps with self esteem. the different motives lead to different long term and intermediate goals. i have a vision for a game engine which would become the best on the market for prototyping. it would take most of the coding responsibility into the engine itself, and there would be far fewer options to fiddle to make it less overwhelming. let me know if you are interested in talking about the vision. digilogic is looking great.

The bugs with area moving and undo seen in this video are fixed in version 0.0.8. I also got the linux build working.

Real time bug finding, lol 😸 I’d love something that uses the old TTL chip images and not the incomprehensible IEEE block type definitions. Being able to select say a 74LS138 and drop it in there. Also to draw a bit pattern to feed into a circuit, rather than just toggle switches. I’ve tried one or two of these sims but felt frustrated at the abstraction, I just want to select a stock TTL part that I recognised and not be limited to a few gates and an ALU. Maybe a parts creator for say an obscure 64 bit RAM chip?

Ohh so it’s fake

you are great!!

Most underrated channel. Great knowledge!!

How did you learn

Thank you for your video. But Please use black background on your future videos...

This is a fantastic project! 🎉 Thanks for getting people excited for compilers 👍

Pretty UI! The state machine with enums you heard about in Rust is probably something like this where you store your state info in the enum then match on that enum (exhaustively) and handle that state., but that's really only handy if you want to store data in a state. Otherwise, not much different. enum States<x,y,z>{ FirstState(x), SecondState(y), ThirdState(z) } ... let s = State::FirstState(0); match s { States::FirstState(data) => {}, States::SecondState(data) => {}, States::ThirdState(data) => {} }

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Thank you for making these videos. I have been working on my own compiler as a hobby project and it is helpful to see how others tackle the different aspects, especially in C.

In my assembler something I added to the parser to help with error handling is code for generating an error message with a consistent prefix including a formatted string describing the current line / character being parsed. Makes most of the error messages a bit more consistent and useful.

brother plz help i want to be like you i also want to make things from scratch but i don't know how whats the roadmap to become like you what resources to follow ?

For digital simulator C is a bad choice, really. Digital circuits have millions objects to simulate. You will have to spend a lot of time fixing race conditions and memory leaks. I believe RUST could be a better choice. But you know digital kinda works already and there is a C++ verilator, I don't believe many people will want one more.

Does your assembler implement macros? If yes you can emit macro instead of function call...

Why do you invent your IR? If llvm ir is heavy /*and it pretty is*/ why not produce QBE IR? Even if you won't use it in final project. First using QBE you can fully test your front-end in development, and it's well designed and pretty easy to parse.

Lines numbers are needed not only for errors. They are necessary for debug build, for breakpoints and stepping in a debugger.

Write C compiler in C! This almost the only way it could be made self-hosted!

спасибо, хорошая работа.

The Rust comment was mostly a joke... but I am porting my compiler building tools over to it from a single page angularjs/javascript.. you can imagine how interesting that's going. That'll support the software tools for my 8 and 16 bit cpu designs (on FPGA). That's also being used an an opportunity to get more into Rust. For digital logic, I use Logisim Evolution... it's also in Java, and slightly rough around the edges. It's very much geared to FPGA development. I have also thought of making my own digital logic sim, but I end up scrapping those projects when I get to concurrent and/or conflicting changes.

about digital logic. i already bought one, and didnt find it at all useful. it wasnt bad, but ive never started the program. i liked the idea about it more than the opportunity. when i was starting out programming around 2005 i was considering a logical programming language. i found something but i dont recall the name. i think it was 'visual logic'. basicly a flowchart programming language. i wouldnt pay for another without major feature improvement. why would i use an emulator for logic evaluation if i know in my head what will happen? about propagation delay... if it doesnt link into verilog, fpga code, or asyc design directly, i dont think it will do well. in my first progaming class there was a dogmatic position that you build a mvp first showing a proof of concept and then you build it right in a completely different language. when it comes to writing verilog, you have to drop your comfortable language to write in a completely different style, and this creates a barrier to entry. if the logical circuit emulator you make doesnt have an export to popular format, meaning you can fix a problem in the simulation and that fix will cascade into the release product, it may face low adoption. if you make it free with ads, you might get some downloads. but to get large downloads you would need to make it into a puzzle game. you could have levels of partial circuits, and optional pieces to fit in set places. in another game mode you could have the pieces needed on the board and the user wires them up. if you make it premium, you wouldnt need to get as many sales, and the more it helps with workloads the more you could charge. charging $500 or $1000 for industrial software isnt uncommon. with charging you could some large supporters. you could start a crowdfund, and if you contact large companies they may also back you. and note that you wouldnt be distracted from your vision and goal. if you make it foss, you can fork an already open source repo, probably, this would reduce costs by reducing the size of teh problem. but it would also likely mean you cant directly profit from it. so, this would also mean that donations would become more prominent. related to foss, is to create a 501c3 charity corp, which would mean that you would have to give yourself a sallary with performance bonuses. this may reduce tax liability. if i was thinking of doing it i would put feelers out to companies in related industries and include that you are a youtuber with thousands of subs posting videos on related topics.

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