Рет қаралды 14,060
A tutorial for electronics enthusiasts new to FPGAs explaining how to run a Digital design on an FPGA with open source tools. Covers simulation in Verilator, building and compiling it, as well as getting a UART setup so that you can talk to it.
Get the source code here: github.com/rj45/rj32/tree/mai...
Get the program I am using here: github.com/hneemann/Digital/r...
If you would like to support this work and encourage me to make more videos:
ko-fi.com/rj45_creates
apio: github.com/FPGAwars/apio
compiling from source:
www.clifford.at/icestorm/
projectf.io/posts/building-ic...
NandLand fpga info channel: / nandland
-- Table of Contents ---
00:00:00 - Intro
00:01:30 - What's covered?
00:05:00 - Required tools
00:07:15 - Tool Descriptions
00:13:07 - What do we need to do?
00:15:16 - Digital Circuit Demo
00:18:01 - Marking Un-Exportable Circuits
00:24:50 - Exporting to Verilog
00:26:38 - Generating the PLL Verilog
00:31:00 - UART Verilog
00:34:14 - Block RAM Verilog
00:36:52 - Linting with Verilator
00:40:25 - Building a Verilator Simulation
00:50:53 - Tracing with Verilator and GTKWave
00:53:55 - Building the FPGA Bit Stream
01:01:42 - Uploading to the FPGA
01:04:40 - Conclusion