This is a world class stuff provided by the owner of this channel. I know there arent much views but may be in some time as the whole world is going towards internet, i see this lecture getting millions of views. Kudos

Very good Explanation For basic Understanding of serdes, Thank you so Much Sir

Man... you are what I needed in my high speed design career 🙏

This is the first time I watched education video without diversion. Thank you very much much for a brief

any day, when an industrial professional explains a topic, it is very easy to follow. Very good job Sir. Hope to see many more videos. Please keep posting.

12:07 Serical protocols: CAN - Controller Area Network Ethernet - Internet I2C - small devices SPI - Low speed peripherals RS232 - present in computer USB - phones, laptops, SATA - harddisk MIPI - Mobile parts - camera and display unit

Well explanations. Very good for beginners. Thanks

I am commenting to let you know are creating excellent content.. Pure gold

Thank you very much that's explanatory! Respect from China.

Please keep making more videos, I really need that. It help me out a lot. thank you sir

very informative, thank you.

I am a physical design engineer...after watching your video I can say that your video is quite informative...

Thanks sir for simple and clean explanation

Fantastic video! Thanks!

Your exppanation is soo cool ,simple and understandng 🔥👌👌👌

Best explanation, thanks sir, from Karthik (Ciso Bangalore)

Best vedio sir..pls continue to post vedios...u r doing amazing

Very very nice explanation .. very good job Sir.. Everything is crystal clear.. Please carry on such a good work

Most important video

Very useful!! Thank you 😃

Very well explained thanks sir

You'r work is so valuable sir. Please keep making more videos. Thank you sir

Very good explanation. Thank you Sir 👍

such a wonderful video...need more videos like this

Very nice explanation of each block, thanks for the video

Thanks a ton!! sir, these videos are a great watch and information packed.

very good!

Thank you 😊

Super content. Please do more videos on High speed Serial Links.

Very good explanation sir and can you explain about protocol mipi dphy

Thank you. It's really helpful to watch this set of videos to understand that basics of Serdes concepts. Could you add the subtitle to those videos? Or auto subtitle would be helpful as well.

Thanks

great vid... :D

very good lectures.....but sir one suggestion for you....please use good quality mic....your voice has air disturbance. may be you are talking very near to mic.

Thanks sir 🙏

Hi , plz add more videos on serdes ,they are very helpful

Every nice explanation .Please add more videos

at 4:00, I am confused as in 2nd point it is mentioned parallel has higher data rate, while last point tells it has lower data rate. As last point is in MBPS, which is data rate. Should it be in terms of clk speed ? like MHz and GHz. Data rate of parallel will be (no of data bit)*(spd of parallel in Hz)/(speed of serial in Hz) faster than serial. 2nd point and Last point together makes sense if units are in Hz.

Hi sir, it was a very good overview of the high-speed serial link. Will you make more content in detail about this? If not, please tell some good references to study high-speed serial links in detail.

Beautiful video. Fantastic slides and presentation. Thanks a bunch. A small correction around 13:26? Memory bus is a parallel communication. This is correctly shown in the slide. But the audio accompanying it gives the feel as if memory bus is serial. Am I missing something here?

Hi Sir, It's pretty good info of serdes. as per the explanation the equilizers are required to boost the attenuation frequency, In that case why do we need equalizers at receiver end??

Good work

Good Work🙂

can you please add video on diff pair routings?

I feel good hearing the "OK". Everything seems to be ok now in the world.

20:32 Here the design of equalizer is depending on channel. So at later stage of layout a Equalizer circuits needs tuning based on channel length? ( You mentioned channel will be few buses, In layout terms we can say high metal routing right . please correct me If I am wrong w.r.t this statement)

LPDDR , HBM and DDR are parallel interface. In fact most memory interfaces other than HMC are parallel. Also there is no SERDES phy in LPDDR. Pls make that correction in your video.

Hi Sir, please post all blocks in detail

Can you please provide link of continued video of this one please it will be great help

Hi Sir i have a dout like why the channel will send week signal to rx , as it's giving strong signal , is it due to capacitence or any other , please clarify this one by anyone

because DDR is parallel interface, the width is long ?

The main problem I see with parallel interfaces is cross talk. Could you please refer me to some crosstalk cancellation circuits? Other issues are data at receiver come at different times.

if all of the protocols use SERDES, why do we have different SERDES? ans: 13:18 PHY means physical layer Vlsi engineers work on Physical layer Every protocol has physical layer with different speeds and requirements etc.,

From the comments here, I gather that Indians are very, very hungry for knowledge. I really fear for the West now.

paused 16:00

I have worked many years with SERDES and I find your explanations very poor. The beginning is missing many explanations: the clocking & synchronization. The channel model is not good: an RC is ok for low speed but for SERDES they use transmission lines which the attenuation vary inversely with the square root of frequency. Equalizer need more explanations. SERDES clock recovery, synchronization and word alinging infos are missing. Table that show PCIe is a parallel bus is incorrect! Although PCIe appear as a parallel bus they use many serial lines in parallel which must be sorted (another missing info).