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Why Equalization?

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Circuit Image

Circuit Image

Күн бұрын

Пікірлер: 24
@michaeletzkorn
@michaeletzkorn Жыл бұрын
Just discovered your channel. A huge life saver. Thanks so much !
@circuitimage
@circuitimage Жыл бұрын
Hi Michael, nice to meet you, and thanks for the feedback. I'm glad that help Life saver. 😃
@madhooz
@madhooz 2 жыл бұрын
Hi, Your explanation along with your graphical pictures is really a great way to understand the concepts...Thanks a lot for your video. Will be waiting for more such videos from you on SERDES, specially on TX side.
@circuitimage
@circuitimage 2 жыл бұрын
You are welcome! Sure. I'll do more circuit images of the TX in SerDes.
@JeetDarji-rg4qh
@JeetDarji-rg4qh 4 ай бұрын
Great video. Thanks for explaining well!!
@circuitimage
@circuitimage 4 ай бұрын
Hi Jeet, you're very welcome and I'm glad it helped. :)
@die_go_die
@die_go_die Жыл бұрын
Excellent video. Thanks for sharing your knowledge :)
@circuitimage
@circuitimage Жыл бұрын
Hi Diego, nice to meet you, and thanks for your feedback. I'm glad you liked it :)
@user-pn3ve6zv8g
@user-pn3ve6zv8g Ай бұрын
Hi, I am a beginner in SerDes circuit design. Your video is really helpful, thank you so much for the generous sharing. I have a question. The concept of equalization is to "flatten" the frequency response of the channel. If we just amplify the attenuated signal with a simple gain stage, the difference between low and high frequencies still remains, and the eye diagram cannot be opened. That is why we cannot just use the gain stage instead of an "equalizer". I'd like to know if this concept is correct. Thanks again for your video.
@circuitimage
@circuitimage Ай бұрын
Hi MingXun, Nice to meet you. I'm glad that helped and you're welcome. :) Your understanding of the concept of equalization is correct. Welcome to the SerDes journey and I believe you'll be an expert soon. :)
@ravindraparmar6653
@ravindraparmar6653 2 жыл бұрын
Great work brother...there were no right videos on KZfaq before ...now I can finally understand serdes and equalization better... please make videos on different preset settings also..and why do we need different presets?
@circuitimage
@circuitimage 2 жыл бұрын
Glad to hear that. Sure. I'll do more circuit images of the different preset settings in detail.
@aradhyavardhan4082
@aradhyavardhan4082 9 ай бұрын
This is really awesome.
@circuitimage
@circuitimage 9 ай бұрын
Hi Lavanya, nice to meet you and thank you for the feedback.
@user-ot9ew9tp1c
@user-ot9ew9tp1c 8 ай бұрын
根據之前的經驗,即使將通道和等化器的整體頻率響應設計為0dB,眼圖也無法打開,推測應該是phase也會隨頻率的不同有所變化,感覺看SPR還是比較可以同時反映magnitude and phase,不確定這樣理解是否正確。
@circuitimage
@circuitimage 8 ай бұрын
Hi Johnny, 很高興見到你,感謝你提出的好問題。您的理解是正確的,但整體頻率響應(通道 + CTLE)不一定為 0dB,這應該由您的連結預算定義。
@gppo0721
@gppo0721 5 ай бұрын
兩位高手好,請問什麼是SPR,搜尋到類似的縮寫但不確定哪個才對….
@circuitimage
@circuitimage 5 ай бұрын
Single Pulse Response
@mizunommjp
@mizunommjp Жыл бұрын
Excellent lecture! I have questions. How do one know when to design an equalizer? Do we need an equalizer for a signal with 6 Gbps? Is there any other technique to improve the signal integrity of high speed signals?
@circuitimage
@circuitimage Жыл бұрын
Hi Masa, nice to meet you, and thanks for the good question. The system should evaluate the medium in the link. For example, what was the signal swing, loss profile, and noise at least up to 3GHz? Then we could decide if a TXFFE is enough, or need an RX CTEL, and then even need one more DFE if the loss profile is too much and the TX output signal swing is too little. I had lots of videos discussing all these trade-offs in detail let me know if you have any specific questions. Thanks again.
@mizunommjp
@mizunommjp Жыл бұрын
@@circuitimage Thank ypu for your reply. Maybe I should give you more specific questions. I am a package designer so not familiar with what is going on inside the chip. My package is an interposer that connects an HBM (high bandwidth memory) to a logic chip. The data rate of the latest HBM is 6.4 Gbps. GUC (Global Unichip Corp) in Taiwan designs chip-to-chip interfaces for TSMC interposers and claims that they have a patented layout technique on the interposer for HBM interface. So my question is this. Is there any technique to improve signal integrity between two dies on the package side? My guess is a passive equalizer that connects high speed signal to ground as high pass filter inside the package (interposer). Am i correct? Or is there any other technique to improve signal quality in the package?
@circuitimage
@circuitimage Жыл бұрын
@@mizunommjp Thanks for providing the background in detail. You're correct. 👍To improve signal integrity between two dies on the package side, there's no active device available; therefore, it must be a "passive" equalizer, like an inductive transmission line (L-C-L-C) ladder broadband matching or a simple C-R filter (high-pass filter) routing through the interposer. 😊
@mizunommjp
@mizunommjp Жыл бұрын
@@circuitimage Thank you for your answer.
@circuitimage
@circuitimage Жыл бұрын
@@mizunommjp You are very welcome. :)
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