Buffer and Inverter insertion in Timing paths | Inverters vs Buffers

Buffer and Inverter insertion in Timing paths | Inverters vs Buffers | Buffer as a repeater

Рет қаралды 4,364

Күн бұрын

Buffer insertion is one of the common techniques to reduce propagation delay in modern VLSI Physical Design during timing closure. This video illustrates:
1. Why do we do buffer insertion ?
2. What are the advantages of doing so?
3. Which one do we prefer ? buffer or inverter ?
4. Demonstration of slew improvement in LT spice
I hope it helps. For any questions or feedback mention in the comment section. Thanks for watching. If you like it, do share and subscribe.

Пікірлер: 12

@timothydahlin5321 7 ай бұрын

Good presentations. Thanks for posting these videos.

@jimedgar6789 Жыл бұрын

Awesome stuff man !!! Gonna save me a lot of problems. Thank you sir !

@LaplacianFourier 2 жыл бұрын

Nice explanation. Thanks 👍

@nikhithasistu5037 2 жыл бұрын

Thank you for this. @6:50, the slew degradation happens due to cell delay of A aswell?

@jairamgouda 2 жыл бұрын

Yes Nikhitha, slew degradation happens due to cell delay of A as well. As we know cell delay is a function of input transition time and output load. If the output load capacitance is high, it takes more time to charge that load to logic high or to discharge to logic low (Unless a suitable driver is used). Which will make the slew to degrade. And as I explained further, interconnect delay is another factor which will further worsen the slew. Hope it clears your doubt 😊

@AtulKumar-tp8hd Жыл бұрын

we use buffer to reduce the delays but output will not be vdd as nmos is connected to vdd, the maximum output can be vdd -vtn so why buffer ?

@dhruvilkoshti 3 жыл бұрын

very nice explanation. can you please explain in more detail how the area of buffer is less than inverter? you mentioned that layout optimization is done to get reduced area for buffer, will you please give some more information about that? any material, research paper or video... thank you.

@vazeer8895 3 жыл бұрын

Even I have the same doubt

@mangapathiraju7198 2 жыл бұрын

May be buffer is not inverter+inverter here . It can be common drain amplifier.

@PavanKalyan-bm3vp 2 жыл бұрын

He is not talking about the area occupied by single inverter.. he is talking about the area occupied after placing two inverters which are to placed at regular intervals..

@jimedgar6789 Жыл бұрын

More buffers means more current consumption.

@jimedgar6789 Жыл бұрын

LOL I meant more inverters :P