Clock Tree Synthesis | Physical Design

Clock Tree Synthesis | Physical Design | Back To Basics

Рет қаралды 10,399

2 жыл бұрын

Hello Everyone,
This is a basic video on CTS which will give you all the details that you need to know about CTS as a beginner.
Here is what you can expect from this video.
1) What is CTS.
2) The inputs to CTS
3) The Output of CTS
4) Checklist before starting CTS.
5) CTS spec file.
6) CTS Goals and Targets
Some of the other videos uploaded on Back To Basics KZfaq channel are given below:
Placement | Physical Design | Back To Basics
Placement | Physical Design | Back To Basics - KZfaq
Floorplanning | Physical Design | Back To Basics
Floorplanning | Physical Design | Back To Basics - KZfaq
Gate Count vs Instance Count
Gate Count vs Instance Count | Physical Design Fundamentals | Back To Basics - KZfaq
Synthesis
Synthesis | RTL2GDSII | Back To Basics - KZfaq
STA Playlist
• Set Up Time | STA | B...
Power Dissipation in CMOS Circuits
• Power Dissipation in C...
LATCH-UP IN CMOS CIRCUITS
• LATCH-UP IN CMOS CIRCUITS
Find all my videos on Physical Only Cells in the following playlist.
/ @backtobasics5602
Temperature Inversion
• Temperature Inversion ...
Working of MOSFET
• Working of a MOSFET
Antenna Effects
• Antenna Effects | Phys...
Outro Template : zipansion.com/1QKOt
#CTS#RTL2GDS#ClockTreeSynthesis

Пікірлер: 18

@vanaparthisubbuu9390 Жыл бұрын

Good 👍 and tnqs for sharing the information

@PadaiKaAsanTareeka 2 жыл бұрын

Explanation was good. Little more about type of CTS structures and their demerits might help even more. Thank you so much for your time as well.

@backtobasics5602 2 жыл бұрын

Thanks for the feedback

@raviraju9018 2 жыл бұрын

Thank you and excellent explanation madam..

@gayathridevinarahari268 5 ай бұрын

good

@home-bh4zk 2 жыл бұрын

Nice Explanation....Mam ... Could you please Make Vedio on TCL scripting language for beginners

@suhass4269 6 ай бұрын

Please provide clock tree structure and explain skew balancing techniques and reducing insertion delay techniques

@santhoshk-rw3fe 4 ай бұрын

Can we create 2 or more skew groups for a single clock ? Is it acceptable or not for better skew minimisation

@sidduabbu9939 10 ай бұрын

It's very good mam

@PremKumar-jq3wg 2 жыл бұрын

can you please explain about calibre tool, like what tool doing, checks, errors

@aravindid9147 2 жыл бұрын

Why should we have min insertion delay for a clock network?

@rockstar-bu2ho 2 жыл бұрын

Mam it has been 4 months would you please make a video on routing

@merrygo7189 2 жыл бұрын

How to decide which buffer and inverters we use to build CTS

@repudiveerendrakumar8080 2 жыл бұрын

build the clock tree with different flavors and compare the ID,skew,power,timing etc. . then you can decide.

@prudhvisaisunkara5534 2 жыл бұрын

Can you do a video on routing stage

@backtobasics5602 2 жыл бұрын

Yes.. The next video will be on routing.

@dhirajthalladi4934 2 жыл бұрын

What are pulse width and duty cycle violations?q

@backtobasics5602 Жыл бұрын

Min pulse width and duty cycle checks are required to make sure that flop functions properly and doesn't go into the metastable state.