It brings back some almost forgotten memories. Around 1991 I worked for 6 years in the Waferfab Automation Department of Philips Semi Conductors Industry in Nijmegen, now Nexperia-ITEC. In that time we had a lot of contacts with the Philips Research Lab and AMSL a former part of Philips both in Eindhoven. A colleague went for 1 year to TMSC Taiwan. I lived in interesting times!

Gary is the best at explaining complicated stuff in an understandable way!

Man no other KZfaqr can cover the topics you do truly an unique chanel

19:13 Semiconductor chips are one of the most precisely engineered things we see in daily life. Imagine how well-engineered and precise the machines that make the chips need to be.

I had no idea of the complexities involved in the manufacture of a cpu. It certainly makes you realize the things we take for granted! An amazing video! Thank you Gary!

Sir, great for explaining this complicated process in a relatively simple manners.

This was necessary🙌🏻

The world is a complicated place. Apple and Samsung are obviously competitors, so I was blown away when I learned that Samsung made the screen for the iPhone X. As we have learned in the last year, global supply chains are highly integrated and optimized for regular flow, meaning any disturbances propagate all over.

Very, very interesting informations and explanations. I really din't know the difference of numbers of transistors in a lithography type, amongst the manufacturing companies. I thought it was a standard thing! Thanks for all the efford and research!

Gary, You explained!

A great video Gary - Excellent summary about making modern CPUs - very compact but never the less extremely extensive content. I was kind of shocked that all big CPU manufactures TSMC, Samsung and even Intel are dependent on just one company worldwide that is able to produce these extreme ultra violet lithography machines. It's the ASML Holding (en.wikipedia.org/wiki/ASML_Holding) in the Netherlands NOT Denmark. In other words, the hole 'silicon' world depends on just one single point of failure. This is quite scary to me.

Thank you so much for making these videos. I find the whole idea of mobile phones and laptops so fascinating due to how much they’re able to do, but I’ve never understood how they were able to work. With Apple releasing the M1 chip I’ve become more interested in learning about it and your videos are really good at explaining the basics. I still find myself getting a bit lost with some of the more technical terms but I usually look them up if I’m not feeling too lazy haha.

Ultra UV lithography, wow what a machine, would like to see @MikesElectricStuff do a tear down 😄👍

*GARY!!!* Good afternoon Professor! Good afternoon fellow classmates!

I do enjoy this channel, you're very good at covering these topics. You have a tendency to rudely and aggressively jump down your subscribers' throats the moment they show any misunderstanding or misconception of the highly complex topics being discussed but your screen persona is polite at least and you do know your stuff.

Thanks Gary, that’s beyond academic grade education. Your way of articulating the info for your topics could land to a degree. I don’t know how up to date Intel’s finfet is, but a comparison to their processes with the ASML machine would be awesome to learn.

Thank you prof, it reminds me of my year in universities!!

Photonic Chip looks to be a thriller in the making.

I know there wasn't time to go into much detail about transistors, but in 9:08 the symbol on the left is for a bipolar junction transistor (BJT), while the illustration on the right is of a field effect transistor (FET). These are different designs. In particular, the FET is a voltage-driven device. There's a *voltage* applied to the middle pin, but it doesn't result in any *current* flowing to or from the middle pin. A really cool elaboration on this design is to leave a disconnected gate in a FET, and then you get flash memory.

Thanks for the beautiful explanation Gary 👏👏

Great video. It amazes me that, with the costs you have described, I can buy a packaged multi-core microcontroller chip for less than a dollar. The smaller chips we're playing with at home are remarkable value.

Facinating video Gary! Thanks!

Thank you professor for explaining!

Awesome explanation Gary! Seeing the 68000 views this video currently has reminded me of the Motorola 68k introduced in 1979, which was named as such because it had 68000 transistors, and was a chip used by things like the Sega Genesis, Amiga, Apple and NEXT systems well into the mid 90s. It was considered high end at the time, but pales heavily in comparison to today's microprocessors! Pretty incredible to think that we're now at billions of transistors some 40 years on, a 14000x increase!! And in systems that run on a small battery and fits in your pocket, no less!

Wow! Been looking for this info for so long. Thank you! Now to find how cpu cache and instructions work and how it’s implemented in these tiny transistors

Love the way how Gary get excited when talk about this topics. Great mate!

Thank you for explaning the works of the transistors

This did a pretty amazing explanation for a 25 minute video, although ISAs weren't touched upon as much.

Great video! it's worth also checking out ASML stepper video 👀, just to get a peek at the internals of that magnificent state-of-the-art masterpiece! 💍

Gary, thank you for N-type and P-type semiconductors and logic. I had almost imagined this.

As an RF/mmWave graduate student I design MMICs so I’m somewhat familiar with some of these processes, but it still blows my mind the way the foundries are able to etch to sub micron level resolution.

Now we know why SD888 kinda sucks with thermals. Hope Qualcomm can secure TSMC slot for its next flagship.

Very good job, Gary!👍👍

This was very well done.

Thanks Gary! This is a awesome video that only you could do! Thanks for the video! LLAP BTW love the music. Feels like I'm watching a episode of 'This Old House" ... :-)

13:45 I will remember that chartch. THANKS Gary!!!!!!!!

Love it. Best explanation ever Thank you

This is very interesting and I have enjoyed it quite a bit. I would love to see you discuss gaming and how some of the newer tech is built. Like for example what is a Cuda Core exactly and how are they built?

This is a great short explanation, Gary!

A brilliant and informative video Gary. Excellent!! Well done. You explained it really well. Looking forward to seeing you in the next one. 😊

I’ve always loved deep tech dives like this , my inner geek is unleashed lol. How did you learn all this your self Gary? University or self taught

Note that masks are only over a million dollars for the leading-edge stuff. For really old processes (well over 100nm) the mask sets might only be tens of thousands of dollars. Obviously the higher resolution needed for the smaller geometries are reflected by the higher resolution needed for the mask set. Larger geometries are MUCH easier to make. Larger geometries are also more refined (years of practice making wafers) so the yields are better, and the machines have largely been paid for over the years. As you go to smaller process nodes, you also need more expensive EDA tools. Cadence sells an "advanced node" license that you need on top of the license to use the layout tool. Once you need to factor in the wavelength of light, the mask sets can start to look more like diffraction gratings (not that I have any personal experience in anything so small), so the tool makers want more money to turn on such features. But if you are making something that is pad-limited (the number of IO pads put a limit on how small the die can be), then you can either put more transistors in the core area (add features, memory, etc.), or you can just use larger transistors to save a few bucks.

I enjoyed this video, Gary you are really 5nm, billions of transistors, you are the best!!!!!!!!

Amazing explanation...! Got to know so much about manufacturing. Thank you.

21:45 Do they get close to 100% yield from the wafers nowadays? I remember reading (back in the 80's) yields were around 33% so the majority of chips on the wafer were useless junk. Some could be "salvaged" by either down-clocking, or disabling functionality (AMD did this with the 29000. If the MMU or Branch Target Cache failed, they'd sell the chip as a 29005 which had neither). If they really usually get full yields out of the wafers, that really shows how far things have come along.

I decided to nitpick the nitpickers. :-) The transistors are P and N CMOS transistors. NMs are 2D measurements. Could the 7nm ??? be from a third a third dimension?

How are those colourful images of dies (die shots) taken? Delided CPUs usually looks just quite opaque black slab

Great job, man that has to be the best video on the topic on all of KZfaq!

best explanations for this field I have ever come across. Cheers, Gary

There are also the EDA companies like Cadence,Synopsys,Mentor Graphics , which makes the software for the designing the chip.

So now that we know how a Processor/SoC/GPU is made per se, how does the processor actually crunch data. Because basically the processor is processing billions of 1' and 0's and how does that translate to what we see on the screen.

You did a good job on this, but you showed mosfets cross sections, and bipolar transistor schematics. Since the logic circuits are quite a bit different(and they are mostly mosfets in modern cpu designs), you should try to fix that if you can :) Also an interesting related topic is power use is mostly switching speed, as the state of the nodes change, it is mostly just charging and discharging gate and interconnect capacitance. Which is why power use is so related to clock speed and cooling is dependent on Watts/chip area. Cray Research estimated you could air cool 100W/sq inch, and 200 for liquid cooling.

OMGAWD. Thanks 🙏 for the vid.

Nicely explained

9:28 the picture on the right shows an n-channel mosfet

Very interesting info! Thanks a lot

Props to the guys who services the ASML machines

Fantastic video, thank you! Could you please make a footage about ARM's role in this process?

As transistors and logic gates are getting closer and closer to the size of the silicon atom, do you not think it’s making the work Xanadu and quantum computing more viable? Then we can start again making them smaller and smaller.

Amazing stuff Garry!!!!

Nicely summarized and in under 30 mimutes. It was important to comment on the RISC-V hype. Unless they have access to a huge amount of near obsolete manufacturing capacity it is not going to be cheap to manufacture. And good luck competing with the Automotive Industry for that capacity. Generally, these type of manufacturing processes have limited capacity, so there won't be much of a revolution if you cannot supply enough of the chips. And you are not going to threaten the hegemony with processors that are order of magnatude slower. They would need to use that same, very expensive, Process Nodes as the leasding processors.

That was extremely interesting. Thanks!

Good info. Nicely explained.

Thanks. Very simple to learn for people who've heard basic terms before

This was amazing thank you!

Great video very well explained

Fantastic video Gary, thanks for this!

woooow great explanation for a very complicated topic in such a beautiful and understandable way

great video... superbly explained! Unbelievable what we can create nowadays!

great explanation but I was really hoping to see a little more detail. I know we can't just get random videos inside intel and AMD but I was kinda hoping for something more visual. However, this is one of the best explanations I've seen, sending to my nephews to let them see and learn. Thanks Gary

This is the explanation we NEED

Love your videos... this one was especially interresting 👍

Great video Gary

Sir it becomes so hard to even imagine the steps that goes through churning a microscopic transistor from a CD type silicon wafer...what happens to those Dutch machines after the process node becomes outdated? Do they make new machines for different process nodes, if yes then is there any use for like 28nm machines in todays time sir?

@9:23 Nitpick alert! The symbol is for a bipolar junction transistor, the picture is of a MOSFET. MOSFET symbol is different.

Great video, thanks!

Unfortunately there will be a delay of a few years for the delivery of high NA EUV Maschines from ASML. So they have to use multi pattering for EUV. 😢

That was great, excellent explanation. Very informative.

Intel also have chips built by TSMC as well.

Roughly 10:30 that was the best explanation I've ever seen on these things. Bringing all the pieces together. Same with the ASML segment. Verry good ! People say, abundant sand, but what these companies need is white sand (like you might find at beaches) which is far, far less abundant. Beach sand prices have been going up. It's also used for buildings (cement). From an article in 2018: "a cubic meter of sand selling for as much as £62 in areas of high demand and scarce supply." Supposedly their is a sand mafia and at times it can get people killed. It threatens wildlife ecological systems, etc. People are working on some solutions for buildings: "A win-win solution is the use of waste plastic in making concrete. Research suggests small particles of plastic waste - “plastic sand” - can replace 10% of the natural sand in concrete, saving at least 800m tonnes per year." Recently had an other reminder on history; mainframe -> minicomputer -> microcomputer. And it seems to me we are now moving to the next step: SOC as laptop/desktop (chromebooks already did this, Apple M1 also).

@Gary Explains: You know what I want explained? WHO makes them? We know what the companies names are but I don't know why we don't know who any of the designers are. It can't be just one genius. What are the names of the people who design the chips and why aren't they famous? I'd like that explained! Not just one or two industry figureheads but the teams. :)

At 2:38, so The Beatles had IC manufacturing capabilities…?

Somewhere I read source of silicon is not sand but quartz crystals.

Thank you, professor.

Present from the Philippines

That was a nice refresher...

Please do not stop making videos about electronic hardware ever. Humanity will be sad if you do.

So if a cpu has say 2 cores that have failed, does the manufacture label it as a lesser chip?

A1 explanation thank you👍👍👍

Am glade I found this page

Your description and image of/for transistors is for the original Bipolar Junction Transistor, but all CPUs use MOSFET (MOS) transistors, (generally an N-MOS and P-MOS transistor coupled together to form a Complementary gate (C-MOS) "transistor"). The symbols are different and MOS transistors switch based on voltage and not current.

Gary you do explain no doubt that's why love ur contents always

I wonder why there's such a steep price difference between 14nm and 7nm per chip design. Is it the mask that makes up most of the difference? Because the per-wafer costs are $5000 vs $5800 it feels very weird for the design to be $80m vs $271m

Good work, very high level but a good overview.

Aliens are in earth extracting silicon which is in abundance so they don't reveal themselves to us 😂 but in future, aliens will attack earth for processors we make 😁

Gary, review your technical explanations, you presented a MOS transistor structure, but a BIPOLAR transistor diagram.

The companies should change their matrix the node number is obsolete and density is one of the better option

wow he really did explain it.

IBM is not fabless, they produce their own processors based on their own design (POWER9), and systems based on that processors, which make them only company which do that (Samsung licence ARM so it is not 100% their design). If we look at companies which make their own design around ARM their are lot of companies what have their own semiconductor fabrication plants (ST, TI ...).

Excellent video.