I am grateful to have people like you on KZfaq ...Blessed to have you

The best thing about this series is that the videos are short and clear cut all imp points are explained❤️❤️

This is a tremendous approach for learning key n core concept.Never ever I had experience and learn this subject in such an easier way. Thanks a lot.

Happy Teacher's Day Sir

Such a pleasure to have you in platform like KZfaq...

i know i have exam tmr and i know i still have alot to prepare but i want to pull a couple of secs to thank this human for literallly helping me in every subject !

nice explanation. what i couldn't understand in three 1 hour lectures ,i got it cleared in 10 min

You helped me fetch good marks in my university exams.Thanks for this videos sir!!You are really doing a wonderful job

It can't be any better. Perfect explanation of 4 bit asynchronous up counter.

what an excellent well layout explanation, sir keep up the good work :D

Indian government should pay to sir to provide these kinds of informative videos provided free of cost by sir which are very very helpful to those students which are financialy weaker to take choching classes and this sir provided very very nowledegable videos which can't be provided by any choching institution.

Thanks a lot ! you made it easy and very clear to me

this guy is just amazing!

You guys are a life saver!!!❤️❤️

thank you so much for the videos, I am a student at MSU Denver EET

Thank you!

such a great explanation sir....

Can we use positive edge triggered for asynchronous counter?

very thankful to you sir

Can we use JK flip flop for 4 bit asynchronous up counter ?

Sir very helpful Explanations

Is this same for all the flip flops..Cause I saw some materials doing d flip flop in a different way.. can you explain please...

What if I put my nose to the grindstone and present a up down counter that counts at the low to high or high to low transition??

this is gold for us students.

Verry useful informations . Thank you a lot !

Thank you sir

Thank you sir!

we use counters only for those flip flops which makes the use of toggling?

Thanku for wonderful explanation

Nice explanation.

Sir can we use T ff for 3bit up counter?

Thanks for giving this presentation on counter this acedmy is best from online revolution is occure

It doesn't work on my Microcontroller with T FF. Have any Idea why? Same config no variable, it counts not in order obviously...!

thank you

Thank you...!!

Sir very good explanation

It is easy to understand tq sir

It's very hlpful sir❤

kindly tell me what is mode counter .

End Term prepration ON :}

Sir, I’ve a question what if we use clock as LSB and Qd as MSB then we’ll have 5 outputs and this will count upto 31. Is it possible?

why do we use toggling mode..?

Tq so much sir its very usefull

Sir, why do we take only the falling edges in case of counter? Hope to get a reply.

I need timing diagram for synchronous counters

can we construct a 3 bit asynchronous counter with the help of t ff similar to 4 bit?

What does state mean?

how do you write from the mouse so fast

Your indian accent makes the videos more enjoyable to watch xD

what if we connect a positive edge triggered?

What's the diagram for asynchronous down counter for t flip flop

why can't we use T flip flop for 3-bit ripple counter?

Bro pls any video on 4 bit ripple down counter?? Iam not getting

Thanks sir

This is what we call a ripple counter right ?

you are amazing, but i still dont get how can you toggle using d flip flop

I cannot understand how can a d flip flop make such toggling effect? as far as I understand that we have d as logic high (1) and the clock is toggling between 0 and 1. for each negative edge Q should be equal to d which 1 so Q should be always high logic 1 not toggling. Can you please correct me if I am wrong and explain the concept behind that toggling effect?

Thnq Very much.... 😀

thanks,,,where from you dear??

Very Good yaar nice videos

how the 1 and 0 changing in the circuit

please make a video on 4bit synchronous down counter

how can i do an asynchronus up counter using jk flip flop ?

Can we use JK flipflop for this 4 bit counter and is the output same as the t flip flop??

I enjoy these. W.

so good !!!!!!!!!!!!

PLZ REPLY SIR!!! In 3 bit/4 bit asynchronus down counter why you have not connected preset and clear???

Sir, i hv a confusion about the usage of clock pulse in up counters and down counters in asynchronous and synchronous counters. When we use Q as an output then Which kind of clock pulse (either positive edge or negative edge) we must use to make up counter (in asynchronous and synchronous counters) ???? When we use Q complement, as an output then Which kind of clock pulse (either positive edge or negative edge) we must use to make down counter (in asynchronous and synchronous counters) ?????? Why the negative edge clock pulse is used all the time. If we use positive edge clock pulse then how to draw the time diagram ???

Sir how to count the unused state of the flip flop.

please make video on 8 bit up down counter

why we are considering only -ve edge triggering for jk and T flip flops......????

thanks sir

Can T FF be used in 3 bit asynchronous Up counter?

sir i have a question , in the counter you use negative clock pulse why you use only negative clock pulse? can i use positive clock pulse?

please upload synchronous down counter

What will be difference if we use here jk flip flop instead of t flip flop

How To enable a four bit asynchronuous up counter?

Sir if I use JK flip flop is there any issue in that?

I need the circuit explanation ....sir for counters .... instead of explaining wave forms

Can anybody plss tell me what is decimal equivalent here ? It would be kind ❤️❤️

Why we are qb falling edge 3 rd line

telugu lo antaru mamsam ni neesu. I love neso

sir,in the above table can we take QA QB QC QD instead of QD QC QB QA.

In the case 4bit should we draw the line upto 16

Sir!, Which application you are using to teach, please tell me?

Sir kya gate ki preparation ke liye ye notes h

Sir, can we still use JK flip flops like the last presentation?

What about a counter the outputs of which all change at the same time? You are good with tables maybe you can double check or fine tune it for me. Email me for details.

Sir...... Why counter worked at toogle state🤔

Great

Sir,,,,can I use JK flip flop in this case?

Why dont we clock as the lowest bit output? That can save us the use of one flip flop and will increase the speed by a factor of 2 ?? Cheaper and more efficient ,

this is using t flip flops?

what if we use positive edge triggered clock

what happens when we apply positive triggering

why are you using the word toggling in this , please answer

Sir plz explain 1K×1 SRAM Organisational

i thought Qn+1 = D for a D flip flop. why is there toggling ?

can we use JK instead of T Flip Flop

V nice sir... Can v design 3 bit counter with T flip flop?