This should be considered a public service. I'm so grateful for the work of this Channel.

Hello everyone :) i believe i how found the explanation to the confusion we are all sitting with. How do we get 0 and 1 as Qn in the truth table's two middle cases.? First, what we must understand is that Qn represents the value of Q in a Nand-SR flip flop. (Q bar) is not represented in this truth table example as it is not relevant in some sence. Next, we must for ourselves try to visualize the Q output. First, let's put: Clock = 1, S=0, R=1. through the first nand gate at the top, (in previous lecture) we take 1 and 0 as inputs and get the S* as 1. For clock and R as inputs we get 1,1 which is 0 (according to our nand-gate truth table. so now we have S* as 1 and R* as 0. If we try to remember the SR-latch walkthrough he did a couple of lectures ago, we know that whenever S is 1, then Q is automatically 0, and when putting that input into the bottom nand-gate with R* then we get 1. so now we have S = 0, and R = 1. However, as mentioned just before, Qn represents the Q, not Q complement. So Qn represnets the Q, which is 0. therefore we put the 0 into the truth table as the value of Qn. For the third case where S = 1 and R = 0, (clock is ofcourse 1) Then the top nand-gate resolves into 1*1 = 0 = S*, and the bottom nand-gate resolves into 1*0 = 1 = R*. so whenever Reset is 1, then (Q compliment) is 0. and when you use 0 as an input for the top NAND-gate with S* then you get 1.. Again, it is very important to remember that Qn represents Q in our Sr flip flop truth table in previous lecture, so (Q compliment ) which is 0, is not included. So basically if you sit down, draw out the SR flip flop sequential circuit with control input as clock, and take clock as 1, and try both: S = 0, R = 1 S = 1, R = 0 Then you will get Q as Q = 0, (Q Bar) = 1 Q = 1, (Q Bar) = 0 But Qn again represnets Q, so the answer for case two would be: Case 2: 0 Case 3: 1. I apologize if i said the same words too many times :) but i don't want to loose anyone :) on beforehand :) thank you :)

Brother, you explain digital electronics as if you are the one that develop flipflops and latches. What a great job!

What my lecturer could not make me understand easily, i just got the easiest lecturer that has made understood 100% for free. I'm grateful for this channel

I deeply appreciate that even this far into the lectures, you still go over the basic things like the k-maps instead of just assuming the viewer knows how to do it. It helps so much with conceptualization and I see almost nobody doing it, so thank you a ton.

This is one of the best KZfaq channels for studying digital electronics. It clears all my concepts and makes learning so easy. Good going Neso Academy!

I declare u the next recipient for noble prize

You are actually working towards making our country developed by developing 1. the brains of so many students in digital electronics who cannot easily understand the concepts 2. mainly free of cost!. THANK YOU SIR.

I love you! Sir, you've managed to explain everything in such a simple and clear way, I'm so so grateful! Whatever takes my uni professor an hour to analyze (and confuse us even more), can be found in a ten minute video of yours. I vow to thee!!

PLEASE MAKE VIDEOS ON DIGITAL LOGIC FAMILIES (TTL, ECL, CMOS etc) and ADC and DAC conversions. Your lectures are great. Thank you so much for them.

Thanks to you, sir, I have cleared my internal examinations of Digital Electronics. Thank you very much. Shout out to Neso Academy! Keep up the good work.

Thank You So much for such a great and simple lecture. It's sequential way of teaching which is very easy to understand.

value of s= Qn+1 value of r = Qn+1 bar ...using 4 cells k map

Each video so far was above average educational quality. Concise and right length. Thx

Thanks a lot for such a good explanation in such simple way.... thumbs up... your way of breaking the long lecture in to smaller pieces is really impressive and understandable..

Great stuff thank you. If anyone is having issues, look at the previous videos. Does a great job explaining everything

Very helpful. Love you for these tutorials. Thank you

Your tutorial videos have been very helpful to me. Thank you for all the videos

its 2020 ,these lectures were posted 5 years ago, but still help full. may God Bless You.

You a life saver brother you know that right?

I have a sequential logic exam today and was looking for that EXACT explanation for hours. The learning materials for sequential logic nets, we got from our professor, listed an excitation table for RS-flipflops and other logic operators. But nobody ever mentioned what an excitation table actually was?! NOWHERE and I repeat NOWHERE on the web could I find an explanation. Even the English Wikipedia article on excitation tables gives an explanation in words as to how one gets to an excitation table that´s about two sentences long. Of course that didn´t help me. THIS is the shit. This is what I was searching for. I could hug and kiss this man. God bless him.

You are the Leonard for Logic Design subject.

awesome explanation sir...now I am able to draw flipflops and its table on my own...THANK YOU...

Thank you sir 🙏 All videos are very helpful and very well presented 🙏🙏

Really puzzle breaking tutorial for me on these concepts. very nice.

Thank you so much, you're doing a really instrumental work for students

I am watching this video at 1:12 am and I have my semester exam at 9:00 am. God help me and bless this man

thanks alot sir , your lectures are life savor :): ))

This chanel not only provides digital electronics but its also provides the best lectures of engineering subjects Well done👏👏

Thank you for the lesson.

Explanations are clear, pedagogy is top notch thanks from France =)

Tomorrrow is my exam! And this helped me alot ... Thanku very much 😋

That was very helpful. sir. excellent explanation.

Sir the teaching is so so amazing keep goin like this I really enjoyed learning this way thank u so very much it helped my exams 😊🙏

Neso Academy.. Oh Thank you so much... I understand it very clearly.... Thank you ...

Thanks a lot due to this i can understand very easily

I guess this charateristics table is When we used NOR gate, right?? as u said when s=r=0 then memory

Thank you so much bro❤❤❤🎉

thankuuu so much.❤..mam ne krwaya tha class me pr mai bhul gyi thi..and u remind me the whole again..thankuu..your explanation is really good😊😊

Thank u so much.. U r an amazing teacher

nice one !! help me to understand more about this chapter for my final exam...

I just realized that i have wasted money behind varsity .. Belongs full semester i didn't even understand anything but two days before of semester final exam i have completed my full course with the help of your video ..

Given Rs 50 via UPI , a small contribution for the great service u do , y'all should do same !

Thank you sir for excitation table🙏🙏🙏

Neso academy you're the best

Thank you Neso Academy.

Thank you for teaching me this course

Neso is god of digital electronics

oh man this channel is so helpful!!!

Thank you so much first time i understood flip flop properly. I had hard time understanding flip flop throughout my engineering but finally i got everything. Just wanted to know why we made this different tables. What are there uses i have completed all the videos till now may be i will understand this in later videos and if not please answer. Thanks a lot

This should be considered a public service

Good presentation 👍...i really got it

well explained thank you so much👍👍

Great teaching ❣️

Very clear explanation...

When clk is 0 then,Q:n+1 must be same as Q:n Why is it changed in characteristic table

Thank you Neso

Excellent explaination

Thank you, sir.

Do we HAVE TO LEARN TRUTH TABLE.

First of all thank you so very much for this fantastic presentation. However I have 1 question left that is still puzzling me: why did you mark the invalid cases as "don't cares"?

this guy xplain it way simplier 👍🏻👍🏻👍🏻

How did you give the value for Q(n+1) when the values of S and R are 0,1 and 1,0 as 0 And 1?? Thanks in Advance.Your Lectures are very Nice and Helping!!

Very nice explanation

Thank you sir

Very helpful. Thanks

Thank you ❤

Thanks again sir

AMAZING 😍. SO THANKFUL 😇

great ......... u save my day sir

great work sir!!! I truly respect u...!

Thanks a lot Sir!

Thank you❤

Thank you

Very good explanation so easy to understand thanx for this video👍

Sir please explain the 3rd and 4th cases of the truth table, I think they should be Qn only not 0 and 1.

good explanation sir. Why do you consider invalid case as don't care?

Hi, Neso. Thank you for your clear and thorough videos. I have just one doubt: why are the invalid states from the characteristic table used as don't cares on the k-map? It's a question some watchers are asking.

THANK YOU SO MUCH

Thaaaaaaaku so much sir kitta bhi thanks bolu kaam h apke liye to

Thank You Sir 🙏🤲❤️

your are the best explainer

Thank you very much sir🥳🥳🥳🥳

Hello sir , you said at the end of lecture ( find value of S and R yourself) what do you mean by it? And how can we find them ? Please help

I am studying every subject form this channel.

Sir, can you please tell me, when S=0 , R=1 & S=1 , R=0 , How did we get the values of Qn+1 as 0 and 1 respectively.

thank you so much bro...😊

The characteristic table is for the active-high signals?

Thank you so much for such an amazing content I have a doubt that why you use that invalid case as don't care in k-map

This truth table is different than taught in previous video. Is this for Active-low SR FF and previous one was for active high? I am having this doubt

I'm watching this at 12:06a.m. because i couldn't understand the class at all. Thank you Indian guy

thank you so much

Thank you 🛐

do you have any lecture on Analog designs?

Thank you!!

Thank uhhhhh so much sir 🙏🙏

Best teacher for Digital electronics

Why should we consider invalid outputs as don't care conditions while writing the K-map?

thank you

OMG! Great lecture.