FPGA #9 - Verilog Vectors & Arrays

  Рет қаралды 1,016

John's Basement

John's Basement

6 ай бұрын

A discussion of how Verilog vectors and arrays work.
Topics:
- concatenation operator {}
- big & little bit-ordering
- bit-ranges [n:m]
- replication operator {n{...}}
- sized integers n'n
- based integers 'bn
- $signed()
- 2's complement + and - are supported
- for loop
- type integer
- vector bit-ranges
Related Github repos:
github.com/johnwinans/Verilog... (This includes links to project 2057, IceStick, and upduino)
en.wikipedia.org/wiki/Verilog...
Oodles of material on Boolean algebra, binary numbers, logic gates, combinational & sequential circuits, etc: • Spring 2021 NIU CSCI 463
You can support this channel on Patreon! / johnsbasement
This video is part of a KZfaq Playlist: • FPGA
Music used in this video (Vibe Tracks, Alternate) was downloaded from the KZfaq Audio Library: kzfaq.info_...
#verilog
#fpga

Пікірлер: 11
@baselkelziye4552
@baselkelziye4552 5 ай бұрын
Hi mr john, could you please upload video on spike simulator setup & usage.
@JohnsBasement
@JohnsBasement 5 ай бұрын
If I knew how to use it myself... Maybe some day down the road?
@varshneydevansh
@varshneydevansh 6 ай бұрын
subbed your channel
@JohnsBasement
@JohnsBasement 6 ай бұрын
Thanks!
@jackrubin
@jackrubin 6 ай бұрын
octal, yes!
@JohnsBasement
@JohnsBasement 6 ай бұрын
😎
@lucwillems5211
@lucwillems5211 4 ай бұрын
this line : word_cnt[0 +: SEGMENT_LEN_W] where SEGMENT_LEN_W=4 , what does it mean ... ? is suspect its the same as word_cnt[0:4] ?
@JohnsBasement
@JohnsBasement 4 ай бұрын
Yes, it is the same as word_cnt[0:4]... and I apologize for misspeaking in the recording when I referred to the big/little BIT-ordering (not to be further confused with big/little BYTE-ordering!) When you say 0:4, you are talking about little-endian *BIT* ordering because the little bit (bit 0) is on the left. Big-endian bit ordering would be 4:0 These discussions are sort-of related and might be useful: electronics.stackexchange.com/questions/622337/why-is-order-of-bits-not-getting-reversed support.xilinx.com/s/question/0D52E00006hpNT1SAM/bit-order-inconsistencies?language=en_US
@lucwillems5211
@lucwillems5211 4 ай бұрын
@@JohnsBasementThanks , i was looking around everywhere but your video explains already a lot.
@jamesross3939
@jamesross3939 6 ай бұрын
Definitely little endian [×:0] ... most 8 bit cpus use this format (that i'm aware of)
@JohnsBasement
@JohnsBasement 6 ай бұрын
You are absolutely correct. I misspoke. 😞
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