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A discussion of how Verilog vectors and arrays work.
Topics:
- concatenation operator {}
- big & little bit-ordering
- bit-ranges [n:m]
- replication operator {n{...}}
- sized integers n'n
- based integers 'bn
- $signed()
- 2's complement + and - are supported
- for loop
- type integer
- vector bit-ranges
Related Github repos:
github.com/johnwinans/Verilog... (This includes links to project 2057, IceStick, and upduino)
en.wikipedia.org/wiki/Verilog...
Oodles of material on Boolean algebra, binary numbers, logic gates, combinational & sequential circuits, etc: • Spring 2021 NIU CSCI 463
You can support this channel on Patreon! / johnsbasement
This video is part of a KZfaq Playlist: • FPGA
Music used in this video (Vibe Tracks, Alternate) was downloaded from the KZfaq Audio Library: kzfaq.info_...
#verilog
#fpga